FPGA analog input rate

[shuishen1983]

I am using 7831R for data acquisition. I set the loop rate to 10000Hz, But what I see on the front panel is the data is updated much slower than this rate. Is there any way to make the display faster? Or the Front panel can't keep up with this rate?

[mishkin]

I believe the 1 MS/s AO speed will be divided down by the number of channels you use since there is only one DAC. If you're using 4 channels, you can expect rates around 250 KS/s. We can easily test this theory by running your code with only one output channel. Can you get close to 1MS/s speed this way?

[shuishen1983]

I am Fresh to Labview. What do you mean by "1MS/s AO speed"? When I change the loop rate to 10^6, the front panel still update slower than expected. When I put a scope(hardware) on the output from the amplifier, I observe much faster change than the same thing displayed on the screen of the computer. Is loop rate the right thing that I should change, or should I change something else?

[mishkin]

Sorry about that. The specifications for the card say that it is able to output 1 Megasample per second on its Analog Output channels (1 MS/s on AO). If you're actually outputting a signal at 1 Mhz, it is possible that the numbers on the front panel will not be updating as fast as the actual signal on the physical analog output channels (since the signal is being output every 1 microsecond, but your computer operating system can only keep up in intervals of 1 milliseconds).

To answer your question, the loop rate should control how fast your signal is actually output. However, I did not see a loop timer (or any sort of wait) in your code, which means the loop will be run as fast as possible. What kind of output rates are you actually seeing?

[nathand]

Do you really expect to see the screen update 10000 times per second?  Even if your monitor could handle it, your eye wouldn't be able to see it.

[shuishen1983]

There is a "wait until next ms" block in the loop. I want the front panel to update the display every 0.1s. But the interval between data recorded should be 0.1ms. As I said if my scope hardware can display faster signal, the computer should be able to do the same.

[nathand]

The VI you uploaded has no "Wait until next ms multiple".  It will be easier to help you if you provide the code that you're actually running.

[shuishen1983]

Here is the two file I use. One for FPGA and one for Host.

[shuishen1983]

I think the rate of update the screen and the rate of recording data are two different concept. I have my screen undate by using "wait until ms".My problem is the number of data points taken is small. How do you think about it?

[nathand]

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@shuishen1983 wrote:

I think the rate of update the screen and the rate of recording data are two different concept. I have my screen undate by using "wait until ms".My problem is the number of data points taken is small. How do you think about it?

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Your host code reads one point of data every loop iteration, and your loop speed is set to 100ms, so you will only see one point every 100ms.  The best way to speed this up would be to use an FPGA DMA FIFO to transfer many data points at once from the FPGA to your host, instead of using an FPGA indicator which only transfers a single data point at a time.  Your FPGA acquires data very quickly and constantly updates the indicator, but the host code only reads that indicator once every 100ms so most of your data is lost.

Also, I can't see exactly how you are opening the FPGA references because I don't have your project, but it looks like you may be trying to open two different FPGA VIs on the same target.  If that is what you're doing, it won't work.