回复： FPGA compile

[D.L.ZHANG]

when i want to transform image from HOST vi to FPGA traget, something wrong about compile. according the information,I have checked my compile tools, and I do have the vivado 2019.1 edition.i readlly don't know what i could do,so please let me know if anybody konw how to fix this question. the following picture may helpful.thanks for your watching.

[Terry_ALE]

I cannot read everything but it looks like the DMA-FIFO datatype in the subVI is different from that of the bitfile.

[D.L.ZHANG]

thanks for your reply. 

i am a newbie in image processing by FPGA and i have imitated others program in transform image and its lot of error.

so if you get any examples, it's really helpful. 

Thanks again 

[Terry_ALE · Accepted solution]

It is not an image issue.  It is a LabVIEW FPGA issue.

Can you look inside that subVI in the host and look for a similarly named DMA-FIFO on the FPGA?  It is must not have the same datatype.

[Longlong99]

Are you use LabVIEW FPGA version、

[D.L.ZHANG]

my labview FPGA version is  2020 edition

[Bob_Schor]

For us to understand what you are doing, you will need to attach your entire LabVIEW Project.  You should also tell us what version of LabVIEW and what "bitness" you are using, and what is your Remote Target (with the FPGA).

Bob Schor

[Zhaoyuc]

Hello Zhang,

I face the same problem with you, could you please tell me how did you solve the problem? I would appreciate it if you could show me your project as a reference.

[D.L.ZHANG]

my suggestion is to be sure your FIFO is right, Base on that to compile your FPGA program first. I can not use ISE14.7 in win10 so I change to ues cloud compile tool.

[Zhaoyuc]

Thanks for your reply.

I created a same host.vi as you, but got a different error.All my versions of software are 2020, and I set up the FIFO to U8x1 from host to target mode. I show my host.vi and target.vi as follow, could you please give me some suggestions?