FPGA compiler Server status says idle but Status says compiling VHDL

[hariharan.s]

when i compile my FGPA vi file , after some time in the compile server window "Server status" shows "idle.." but the status box shows "Compiling VHDL".

It stays in this condition for a long time about 30 mins. Why is this happening? I am also attaching the screenshot of the compile server.

FPGA vi i am trying to compile is the Sine Generator.vi which was there in examples under FPGA Fundamanetals->Analysis and Controls.

[Ipshita_C]

Hi Hariharan,

To answer this question I would need a little more idea on what is there in your FPGA VI. do you see this behavior with other FPGA VIs too or this particular one?

Ipshita C.

[hariharan.s]

I am attaching the block diagram of the fpga vi. It is a sine generator example which was in the labview examples folder.

I am seeign this behaviour only when i compile this fpga vi. I have compiled other fpga vi's without any problem.

[Ipshita_C]

Hi Hariharan,

At first glance, your FPGA VI seems to be fine. The only things that look like they might cause the compile server to hang might be the fact that the 4 sine waves are being generated simultaneously. However, that is not a strong enough reason. Was your VI developed or compiled in a previous version of LabVIEW FPGA or NI-RIO?

Ipshita C.

[hariharan.s]

I found the VI under the folder LabVIEW 8.5->examples->compactRIO->FPGA Fundamentals->Analysis and Control folder.

I assumed it is for the version i have since i have not developed it. I just used the VI and it did not show any errors excpet for the compilation required error.

And when i tried to compile it  is giving this error.

[Ipshita_C]

Hi Hariharan,

I have followed your instructions to set up the same situation but have been unable to reproduce your situation--I shall try again. Please confirm that you have made no changes in the original sine wave generator example.

Ipshita C.