FPGA integrity testing tools

[Thoric]

I wish to diagnostically test my cRIO FPGA chip. Why? Well, I noticed some bizarre code behaviour on my FPGA recently and decided to recompile my FPGA code (a mighty three and a half hour job). Although I made no changes to the FPGA code, the new version works fine. This worries me a little. Did the upload from the RT code fail? Does the FPGA chip have a dodgy gate on it? Did the recompile produce a different bitstream result (in which case is the Xilinx compiler buggy)?

To help answer one of these questions I thought I'd simply run a diagnostics check on my FPGA chip - but I'm not aware of any that exist. There's no mention of any on NI's website (that I can find) but it sounds like an obvious requirement so there must surely be some test I can run.

Does anyone have any information on diagnostics for FPGA on cRIO boards?

Thanks in advance.

[Mark_SAI]

Hi,

I'm afraid there are no obvious diagnostics you can perform. My suggestion would be to watch to see if it happens again in a measurable way that you can prove easily to NI, then you can talk to an Applications Engineer to discuss any repair options. (note: if you can't reproduce the issue then its difficult to action anything. If you have a mission-critical application then consider using a spare cRIO in its place and running the potentially faulty cRIO somewhere else)

The other option is that your code may have a bug in it (sorry to say that, nobody likes hearing it but it would be stupid not to mention it) so you could get someone else to check it over to see if they can spot any obvious flaws.

Hope this helps,

[Thoric]

Hi Mark,

Thanks for the information. Sad to hear there are no diagnosis or integrity testing tools. The only way I can think of to demonstrate the issue is to use the original (fault-causing) bitstream file, but as you've pointed out there's no easy way to prove that there isn't simply a bug in my code.

[Mark_SAI]

Hi,

What do you mean by bizarre behaviour? If I knew this then it may give some ideas as to more specific tests you could perform yourself.

[Thoric]

There is a nested while loop, the inner loop of which exits on one of three possible boolean results. According to the code logic, there is no possible way that this inner loop can run for more than 10 iterations. It appeared from observation that the inner loop was stuck in a perpetuity. I cannot prove it was stuck here however because I don't have the iteration counter as an indicator to monitor from the Real-Time code, however the status of the FPGA outputs strongly indicated that this while loop was not exiting. It's difficult to prove, if not impossible, so I can't be sure what the cause of the problem is - hence my interest is ruling out a bad FPGA chip first before I spend many hours/days attempting to debug what appears to be sound FPGA code.