FPGA issue

[barla]

Hi

Am using PCI5640R and 8.2. 

Am operating the ADC in Single tone mode. I am collecting the IQ samples in a Target to Host DMA. The FPGA target is running at 25MHz.  and the IQ rate is 12.5MS/s. So when I see the samples in the Host the samples must repea, coz the datarate(IQ) is 12.5MS/s and the clock rate of the FPGA is 25MHz(which is double the rate). But when I see the IQ collected in the Host the samples are not repeated. Kindly help me to understand the same

Thanks in advance

[cs_BOT]

Hi,

What are the consecutive data/samples that you are getting? Are the values very different?

Also, your FPGA target is running @ 25MHz, but i didnt understand what is IQ rate. Is this the speed of the FIFO?

Can you please give more description of your issue. Also, try to keep your subject more specific so that other forum users get more information from the subject line and select/read your thread.

Regards,

Vaibhav

[barla]

Hi Vibhav,

Thnx  for your kind response,

I am using the ADC in the single tone mode So the  consecutive IQ values would vary. 

From ADC output pin the samples are entering the FPGA at 12.5MS/s. And the  FPGA VI is running at the 25MS/s. So the IQ rate is half of the clock rate. So the sample must repeat 2times according to my understanding. But for the same IQ rate and the clock rate, the sample collected in the Host are not repeating.I want to understand issue.

 Thank you

[TurboTurtle]

Can you tell us a little more about your inputs that you are getting? are the two consecutive values close to each other? is your ADC able to hold the value long enough, or is there a voltage drop due to low capacitance? if you give a DC value to your ADC, are u able to get the correct values on your board?

Regards,

Vishal