FPGA - printing intermediate files hang

[Joachim082]

Hi,

I have a problem during the compilation of my fpga code. During the print of the intermediate files the state hangs and the memory allocation of the labview.exe process increases - cpu load is 100% on one core. The problem is the code with the initialization of an array. I have 3 interfaces which shell be organized in one array. Therefore I have a loop for every module and one array (array size of 720 elements). Apparently something is wrong with the array operations? What I am doing wrong?

Has somebody an hint?

Best Regards,

--
Joachim

[Christian Mergl]

Hi Joachim,

One of the things you should never do in FPGA is to place Arrays at the frontpanel since they have to be implemented twice on the FPGA logic.

If you need to pass array data from the FPGA to the Host or the other way use DMA FIFOs instead. If you simply need to create a waveform or if you store simulatione data in that arrays use a lookup table.

Christian