FPGA's DRAM configured in the CLIP mode as a FIFO

[gppatel]

Hi all,

Is it possible for me to overwrite a DRAM configured as a FIFO (i.e. prevent it from timeout) without using the read function.

All I want to do is to keep on storing data on the DRAM until there is a fault and then read the latest data in the memory.

[Ben_J1]

Gppatel,

   If the DRAM is configured as a FIFO it will always timeout when filled. In order to use the DRAM in the way you would like you would essentially need to implement a circular buffer with it by keeping track of the memory location as you go and managing it accordingly. Does this make sense?

Regards from Austin,

[gppatel]

Hi Ben,

With this Circular Buffer to be implemented on the FPGA DRAM, would it be implemented in FIFO/CLIP mode or Random access / FPGA Memories mode ?

And I guess a seperate counter needs to be implemented to track the Address for the FIFO or random access.

Do you have any examples or documentation of circular memory being implemeted on the FPGA DRAM?

Regards,

Gunjan

[Ben_J1]

Gunjan,

   I do not have any experience with implementing a FPGA DRAM Circular Buffer but I will do some research and get back to you.

[Ben_J1]

Gunjan,

   Look here to see how to implement DRAM on a FlexRIO project. Essentially there are to ways to implement it in a non-FIFO use: Memory and CLIP mode. CLIP gives you a little lower access to the DRAM memory but for the purposes of a Circular Buffer the memory should suffice. Since the DRAM is only used by the FPGA as defined by the user you do not need to worry about background tasks or overhead using the DRAM of the board. One good implementation would look like this:

   Create two numerics to define the beginning address and ending address of the circular buffer. The difference of these two will be the size of the circular buffer. Then using memory access, which looks like the upper right picture of the linked Discussion Forum, you can read and write to the memory:

With the beginning address, the ending address, and a way to access the memory all we need to to is to track the current address. Use Shift Registers to pass the current address through iterations of a loop. In implementing the circular buffer I would also monitor the earliest valid data address in order to watch for overwriting in addition to when you need to read the circular buffer. 

This should send you in the right direction!

Regards from Austin,