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FPGA to RT latest value

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Hi Eyal,

 

- How fast are you reading the pulses? What is the value of "actual time counting"?

- Why don't you use a subVI for the counting functionality? Duplicating code doesn't help for readability…

- You didn't attach the project file, so we don't know the FIFO sizes you defined in there.

- Why do you use FIFOs at all? Why not read the "number of pulse x" FP indicators in the RT host?

- How fast are the FIFOs filled - and how fast do you read them on the RT host?

 

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Message 11 of 17
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HI gerdW
-the actual time is 47us
-yes i need to organize the code better
-the FIFO define as 1024 elements of 32I
-i tried as you said to read it directly but its have some delay, with FIFO i get better result but still
i have add the project, if you need more information or something telling and thanks for helping!

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Hi Eyal,

 

so the FPGA takes 47µs to execute the DIO (pulse counting) loop?

 

I still would use either 4 numeric indicators or even an array of 4 elements in the FPGA for those 4 counters. Read those values in the RT host using a ReadWriteControl node.

- You can resize the ReadWriteControl node to read or write more than one control with the node.

- When using an array of 4 elements your data handling in the RT loop is also simplified: the scaling can be applied to the array, you could use the "1d array" instance of the PID function (!)…

- The ToFXP functions in the RT loop don't output the datatype expected by your FPGA controls. I would avoid the coercion dots here…

- In the RT loop you also read network shared variables: do you really think you should do network communication in a deterministic TimedWhileLoop?

 

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Message 13 of 17
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Ok thanks i will try 
yes the FPGA takes 47 for the DIO loop
the global variable is used only at the start to get the points for the set value.

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Accepted by EyalZ

Hi Eyal,

 

the global variable is used only at the start to get the points for the set value.

In your RTMain loop you are reading those SNVs with each iteration!

 

yes the FPGA takes 47 for the DIO loop

Then it takes 47µs to read all those DI pins and to stuff the pulse counts into the FIFOs.

What about reading the DI pins at once and use IndexArray to get the single lines?

check.png

This will read the NI9403 module much faster than your 7 separate ReadIO nodes!

I use the NI9403 module too, it allows upto 140kHz sample rate or 7µs loop time!

 

Then you need to tidy up your RT loop to: use arrays!

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Yes i read from the global every iteration, first i need to upload the points from file and move them to the RT. if you suggest a better way i will try.

for reading multiple pins how to do it? is there some configuration to be done?
if you can upload some example or explain it?

thanks for help!

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Message 16 of 17
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Hi eyal,

 

all you need for reading multiple pins at once is shown in the image above...

(I'm on mobile now, so try on your own.)

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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