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FPGA

Hello,

 

 

I'm a new in FPGA topics,I'm interested in FECG extraction and I will use a data base to recover the signal to process. In our research laboratory, we have some hardware that I want to adapt them to do a FECG extraction. We have labview 8.6, SCB-68, NI PXI-1033 and NI PXI-7841R. I don't know if I just use the signal from database (that's mean I didn't use the SCB-68) that's mean that I can't use the FPGA ( because the FPGA are connected to the SCB-68)? I will be able only to use  the LabView? Or it's possible to use the FPGA without the SCB-68 ?

 

Thank you very much to help me :Smiley Tongue

Yours Sincerly

Rira

 

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Message 1 of 21
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Hello rira18,

 

The FPGA can be used for processing data, and does not necissarily need to be hooked up to the SCB-68. You will have to find some way to interface the data from your database to the controller on your PXI chassis, pass the signals to the FPGA, process them, and pass the processed data back up to the controller.

Cheers!

TJ G
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Message 2 of 21
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Hi,

 

Thank you very much to reply to my topic, you give me a real help Smiley Happy

But I didn't understand what's kind of "interface" I have to use, did you mean graphical interface (Labview) or another type of interface?

To compare the acquisition of the signal from the database (the signal is very weak and with noisy) I want to use a NI DAQ 6009, I didn't know if it's possible to do the acquisition with NI DAQ and in the next step pass the signal to the FPGA or when I use the DAQ I can't use the FPGA?

 

Thanks a lot !

Sincerly yours

Rira

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Message 3 of 21
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Hello rira18,

 

Let me see if I understand what you want to do correctly...

 

Acquire some data using DAQmx and a USB-6009

Pull a waveform out of a database

Pass both of these waveforms down to an R-Series FPGA card

Implement a comparison algorithm on the FPGA

 

This could all be done from LabVIEW + LabVIEW FPGA if this is what you're trying to accomplish. I personally would do the data acquisition from the R-Series card as well, but if you would rather use DAQmx to do the acquisition, that will work.

 

Are you trying to avoid using LabVIEW for this project? Our R-Series devices can only be programmed from LabVIEW FPGA if that is what you are asking.

Cheers!

TJ G
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Message 4 of 21
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Hi,

 

Thank very much for your precious help and I’m sorry for responding late but I have to try the acquisition before to contact you

I thought that I didn’t explain clearly my topic

 

In the fact, I will use LAbView to manipulate the FPGA,  I want to separate fetal ECG from the maternal ECG, for this I have to do this with different manner and compare them:

1)      I will use different algorithm in LabView to calculate The fetal heart rate, the amplitude of each wave form and the duration

2)      I will do the acquisition of  the signals with different way using:

 

  • First, I have to try to acquire 2 signals  (for example sinus and square signals combined) and separate them with the appropriate algorithm
  • Second, I have to test the separation of fetal ECG and maternal ECG signals (simulate signals) that I find in the NI example (can I use them with the FPGA? and how?)
  • Finally I have to use a real signal

     - From data base (But I don’t know how use the)

     - From pregnant women (But up to now I didn’t find a woman which accept to go with me to the search laboratory because they afraid) with SCB-68. That’s why, I thought if I will bring the hardware to the hospital may be I improve to chance to find women accepting this or I thought to use the SCB-68 to instead to transport all the hardware.

 

3)      Before beginning the acquisition I want design the possibility choosing the acquisition mode, single (one electrode for the abdominal ECG and one for the thorax ECG) and multichannel acquisition (8 electrodes 5 abdominal and 3 thorax and having the possibility to changes the choice 4 abdominal and 4 thorax….)

 

I try to do the acquisition block diagram FPGA (following the example video and example which work correctly with one acquisition) by two manner: with FIFO DMA and with IRQ but I didn’t know what to change to obtain two acquisition instead one showing by the example, to do block diagram do I have to repeat each time (new project, choose Input output,…..? because I tried to copy and paste it but I doesn’t work an I spend many time to do each time a new project  Smiley Sad

 

For this, for FIFO method and IRQ method could I have to use two FIFO  and changing the size from 32 bits to I16 or U16? Or I have to repeat the bloc as much as the number of acquisition? And also do I have to change the proprieties of the clock timer and tick counter from 32 to 16 bits? Please find below the attachments. For FIFO method, I didn't change any things compared to the original example I just added two acquisition instead one but it didn't compilate correctly. For IRQ I just changed the loop timer to 16 bits in the FPGA block diagram, and the compilation work correctly but I find problem in host block diagram.

 

I deeply appreciate your help because I’m feeling lost and if you can communicate me the acquisition it could help me so muchSmiley Happy

 

Best regards

Rira

 

 

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Message 5 of 21
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Hello rira18,

 

At the speeds that you would like to do your acquisition, I recommend using the FIFO method. Looking at your block diagram, it looks like the FIFOs just arent configured properly. You can configure them by right clicking on them in the Project Explorer, then select properties. Next, select Data Type on the left hand side, and change the data type to U32 (for the way you have your application set up). In this article [ http://zone.ni.com/devzone/cda/tut/p/id/4534 ] there is an explanation of how to send multiple sets of acquired data through one FIFO back to your PC. Since you are acquiring 2 16bit points, you could also try something like this:

 

 

FIFO acquisition.png

 

 

 

 

 

 

 

 

 

 

 

This puts both of your 16bit readings into 1 32bit number. On your PC, you can then split this number back into the 2 components via the split number VI. If you do change to a system that has more than 2 input readings, I would use the method referenced in the link I provided above.

Cheers!

TJ G
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Message 6 of 21
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Hi T-Rex$,

 

Thank you very much for your precious helpSmiley Happy

 

I will try it and I will communicate my feed back

Do you have an idea about the use of real signal from the data base with the FPGA "Daisy database" (http://homes.esat.kuleuven.be/~smc/daisy/daisydata.html) and the "MIT-BIH" http://www.physionet.org/pn3/nifecgdb/ ? Because I didn't know how can I used them.

For the simulate signal (generated from LabView inthe examples) can I use the in block diagram of the FPGA or the block diagram of the host ?

 

Thanks a lot

 

Kind regards !

Rira

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Message 7 of 21
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Hi rira18,

 

It looks like the first database is a gzipped file. I've never dealt with this kind of file on a windows machine before. Fortunately the free utility 7-Zip knows how to extract the .dat file. From here I opened up the .dat file in Microsoft Excel, and saved it as a tab delimited text file. Opening this type of file is extremely simple:

 

 

read in text file.png

 

 

 

 

 

 

 

 

 

You can then convert the data to FXP values and pass them via FIFO down to the FPGA.

Cheers!

TJ G
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Message 8 of 21
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Hi T-Rex$,

 

Thanks a lot to indicate it, you give really a great help Smiley Tongue

I'll check tomorrow and I inform you about all the feedbacks, what about the type of simulate signals of LabView example (please see below) Can I use them in FPGA, If yes, can you precise it to me

 

Thank you very much

Kind regards !

 

Rira

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Message 9 of 21
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Hi rira18,

 

I looked at the document that you sent over, and I am not quite sure what VIs you are using there ,so I'm not sure how to answer your question. What are the names of those VIs?

Cheers!

TJ G
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Message 10 of 21
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