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FPGA

Hello 

 

I am using Ni Flexrio...when I am compiling the VI on my FPGA target then I got xilinx compilation errors stating that the IO component has illegal IO standard value.

 

Please help 

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Hi,

In this case I would use an allowed value...

What kind of answer do you expect with this little information you provide? Show your VI!
Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Hello I have attached the VI as well as the error

 

W. Regards

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