Finding the cause of error 61211, is there a way to list names?

[Saila21]

Hello Everyone,

LabVIEW novice developing on a cRIO system using LabVIEW FPGA and Realtime.  

I've been able to faultfind the error messages down to when the RT main loads the FPGA reference, which then throws 61211 "multiple resources with the same name".

I've been over and over my FPGA Main VI to try and see where I might have two resources named identically but I just can't seem to find it.  

Is there some mechanism to actually list the contents of a VI by name so I can then index through each one or find the location of each one in an attempt to locate this rogue item?

Also, is it possible that there's a conflict between objects named in the FPGA VI and one of the Realtime VI's?  

As I mentioned I'm a novice.  I've done Labview Core 1 and 2, as well as FPGA and just finishing off Realtime 1 in the online training.

I apologize in advance for not being able to post code here.  However the structure of my project is based on the LabVIEW "FPGA Waveform acquisition and logging using CompactRIO" example project.

I have successfully deployed and run the logging and control code in the past, in modifying the FPGA code to use occurrences to synchronize the execution of several sequences this error has surfaced.

Thanks very much for any assistance

Will

[GerdW]

Hi Saila,

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@Saila21 wrote:

I have successfully deployed and run the logging and control code in the past, in modifying the FPGA code to use occurrences to synchronize the execution of several sequences this error has surfaced.

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So you did some changes, and now the example code is not working anymore?

You should focus your search on the changes you made!

Why do you need to use occurances? (I never used them, not even with default "LabVIEW on Windows"…)

Why do you need to use them in the FPGA?

When you want more detailed help you really should attach some code…

[Kyle97330]

I do agree that using Occurrences is a bit weird, but to get to your actual question...

I assume you have seen this article as it's the first one that shows up in a search.  It lists these things to check:

• Make sure you are only using one Open FPGA VI Reference function in your code to access your FPGA resource/card.
• Make sure there are no controls and indicators with the same Label.
• Make sure there are no DMA FIFOs, or FPGA resources accessible through the host that have the same name.

For the first and last one I'm not sure, but for the middle one you have a couple options.  You can use something called "VI scripting" to check your VIs manually and be as customizable as you want, but it's hard to learn (NI tutorial here, or you can search around for others), or you can try using VI Analyzer, which is much easier to learn but is limited to a series of premade tests (you can add extra ones or create your own, but it's a lot more involved to do that).  VI analyzer also needs a development license to run, which you may or may not have, though you can install an evaluation version for a short time if you don't have a license already.  I know the developer version of LabVIEW comes with it, but I don't know about other versions.  It gives you a list of things you can scan for, including duplicate control labels:

For VI scripting, if you did do that you'd probably want to run Traverse for GObjects on a VI and then use it to find all controls, indicators, etc. that can have name conflicts and compare them.

[Saila21]

I have removed the modifications I made to attempt to use occurrences.  The issue still exists.

I had looked through several guides like this one

(https://www.ni.com/en/shop/electronic-test-instrumentation/add-ons-for-electronic-test-and-instrumen...)

I have one FPGA loop that contains a sequence which uses the IRQ to synchronize the RT loop and FPGA loop.  This then sets the settings to the 9775, and then starts it running and placing data in the FIFO.  This has an outer "restart loop" that contains a flat sequence, and an inner "run loop" exactly how that NI example code is arranged.

In a similar configuration, I have two separate other loops that control digital IO signals with very specific sequencing delays between them.  This is also in an outer "restart loop", with a flat sequence and an inner run loop.

The use of occurrences was an attempt to hold execution of the digital IO flat sequence at a particular point, until the 9775 has started.  Things don't have to execute at the same rate, but they must all start at precisely the same instant.

Maybe this is not the best method to do such a thing.  I admit I am a novice.

Apologies for not being able to post code examples.

[Saila21]

Hello Kyle thank you for this advice

I do not have the ability to run that VI analyzer on anything other than the RT code, and then only with fewer options than your example.  Unfortunately I am not sure this will help me.  It looks like a very useful tool, but I don't appear to have access to it.

I have only one Open FPGA in my code, within the RT Main VI.

I am trying to find any duplicate controls or indicators within my FPGA VI but I do not see any.  I am guessing that this is also an issue with controls or indicators having the same name between the FPGA VI and the RT VI's?  Everything should have their own names.

There is only one DMA FIFO, between the FPGA and RT and that has been tested and working previously.

I have run highlighted execution on the RT Main and the error is output from the Open FPGA Reference, which is at the very beginning of operation.  So I believe there is an error in my FPGA Main.  I will keep looking for it.  

Thank you very much for your assistance, it is a complicated system to learn very quickly.