Generating signals on Trigger interrupt with HSDIO PXI-6451 module

[HuguesThales]

Good afternoon,

I am using a HSDIO 6541 module to generate and acquire SPI signals from a FPGA. The acquisition should be synchronized with an external CLK which I physically wired to the PFI 0 input.

I created a .HWS file using Digital Waveform Editor and used SignalExpress to send this signal on every falling edge of the PFI 0 input through the Trigger Tab. Unfortunately, the SPI signal is only send every 116 falling edge.

I have tried changing parameters here and there, but just can't seem to have it work ! Here is what I am observing. (MOSI, SPI_CLK and CS are generated by the HSDIO module, RTC is what's connected on PFI 0 and MISO is generated by the FPGA).

I have tried doing the same thing on Labview using NI-HSDIO Express (Generation) and observed the same behavior...

Do you have any idea of what I'm doing wrong? Please find pictures of my code attached as well as the .HWS file.

I am also curious as to why the CS remains high for a few us but that is a different problem.

Thanks a lot in advance for your help,
Hugues

[Cdkey]

Hello HuguesThales,

Can you try this example: https://forums.ni.com/t5/Example-Program-Drafts/SPI-Generation-and-Acquisition-using-HSDIO-Hardware-... ?

It is made to do SPI communication with the card PXI-654X.

Have a nice day!

Clement

[HuguesThales]

Good morning Clement,

I haven't been able to try your example yet as I was off work for the past 2 weeks.

I will keep you informed as to if my problem is resolved as soon as I manage to open it up! I currently run Labview 2015 and this is a Labview 2017 example.

Thank you for your help,

Hugues

[HuguesThales]

Good afternoon Clement,

I managed to open up the example you linked and now have a better understanding of how the HSDIO Module works. However, there are still a lot of things I don't understand:

1) 16-bit Register Swap

The example you linked uses the example "16-bit Register Swap" to create a Waveform that is later generated by the HSDIO Module.

By default, these were the values assigned to the front panel of the "16-bit Register Swap" example:

16-bit Register Swap front panel with default values

My SPI_CLK should be set to 10MHz so I changed the parameters as shown below:

16-bit Register Swap front panel with 10MHz values

As you can see, the waveform is not what's expected... I tried tuning up the different parameters but wasn't able to obtain any satisfactory result 😞

2) Dynamic Generation and Acquisition

Here is the code of that example:

Dynamic Generation and Acquisition - Code

Using the default parameters of "16-bit Register Swap", "Dynamic Generation and Acquisition" does generate SPI signals: (nice)

SPI Signals observed when "Dynamix Generation and Acquisition is run with default parameters

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I also don't fully understand how these .vi work:

3-1) niHSDIO Configure Sample Clock.vi:

What's the "clock rate" input for? It’s set to 10MHz by default but that doesn't seem to affect the SPI signals.

3-2) niHSDIO Export Signal.vi:

What's the "signal (sample clock)" input for? It is set to "Sample Clock" but I have no idea of what that implies.

3-3) niHSDIO Export Signal:

The "Signal (sample clock)" input is set to "Active High" and the "output terminal" is set to "PFI2". Is that why PFI2 is observed to be at high state when SPI signals are sent?

3-4) niHSDIO Configure Digital Edge Start Trigger:

Similarly, I thought this function would start on PFI3 rising edge. However, it seems this function is executed before niHSDIO Initiate.vi (which physically generate the SPI signals), hence before PFI3 could trig! 

4) Improvement of Dynamic Generation and Acquisition:

I tried to make some change to "Dynamic Generation and Acquisition" so that more than one SPI buffer would be sent. I tried to duplicate the niHSDIO Initiate.vi function and I did observe 2 SPI buffer, but why is there a 800us gap?

Dynamic Generation and Acquisition - niHSDIO Initiate.vi duplicated

I'm sure I could avoid that gap by generating a single larger waveform, but that wouldn't be scalable. (My goal being to setup a continuous, uninterrupted acquisition for long durations)

Any answer to any of these questions would be welcomed. (Let me just remind you I'm new to Labview)

Thanks a lot in advance for your help,

Hugues

[HuguesThales]

Good afternoon,

Let me start by going over question 1) of my previous post. I solved this issue by also changing the “Sample Rate”.

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I will now go over where I'm at with the generation of SPI Signals.

Please find attached all the VI and pictures in "Question3.7z".

1) Single synchronized generation and acquisition:

See folder "Looped synchronized generation" in .zip file.

Dynamic Generation Hardware Start Trigger Modified.vi generates and acquires SPI signals (which originate from a .HWS file) once on a falling edge of PFI0.

Here is my Pinout:

• Pin 1: MOSI -> wired to ASIC
• Pin 2: SPI_CLK -> wired to ASIC
• Pin 3: CS (active low) -> wired to ASIC
• Pin 16: Wired to a GBF (not used in all pictures)
• Pin 22: MISO -> wired from ASIC

The .VI is working as intended as shown on Single synchronized generation and acquisition - Oscilloscope.png and Single synchronized generation and acquisition - Front Panel.png.

MOSI, SPI_CLK and CS are generated by the HSDIO PXI-6541 module. The ASIC answers on MISO. The signals appear on the Oscilloscope and on LabVIEW.

However, I will ultimately have to change:

• The input from a .HWS file to something similar to example "16-bit Register Swap". This might not be easy because my SPI signals are 48bits long.
• The Output from the current "oscillogram" to actual decoded data. I guess something exists but I haven't tried anything yet.
• I will have to loop this to send the SPI signal on every falling edge of a 7.2kHz HTR. (This frequency could change but it would be around that value)

I tried to loop 1) in 3 different manners:

2.1) Looped synchronized generation and acquisition - TEST 1:

See folder "Looped synchronized generation and acquisition - TEST 1" in .zip file.

This doesn't work, the SPI signal is only sent once on the first falling edge as shown on Looped synchronized generation and acquisition - TEST 1 - Oscilloscope.png.

2.2) Looped synchronized generation and acquisition - TEST 2:

See folder "Looped synchronized generation and acquisition - TEST 2" in .zip file.

This partially works. SPI signals are generated on some but not all falling edges of PFI0. The generation/acquisition frequency is around 600Hz as shown on Looped synchronized generation and acquisition - TEST 2 - Oscilloscope.png.

2.3) Looped synchronized generation and acquisition - TEST 3:

See folder "Looped synchronized generation and acquisition - TEST 3" in .zip file.

This partially works. SPI signals are generated on some but not all falling edges of PFI0. The maximum generation/acquisition frequency is around 1.3kHz as shown on Looped synchronized generation and acquisition - TEST 3 - Oscilloscope.png.

Note: I haven't managed to display the data but I'm assuming the data was acquired properly.

3.1) Looped synchronized generation

See folder "Looped synchronized generation" in .zip file.

Dynamic Generation Hardware Start Trigger Modified.vi generates SPI signals (which originate from a .HWS file) on a PFI0 falling edge.

Again, the maximum generation frequency is around 1.6kHz as shown on Looped synchronized generation - Oscilloscope.png.

At this point, one may think that the HSDIO simply cannot generate SPI signals any faster than 1.6 kHz. However, I am sure that it can! Here is why:

4) Generation with LabVIEW Express Generation functions:

See folder "Generation with LabVIEW Express Generation functions" in .zip file.

Express.vi and the corresponding pictures show that:

• The module is able to generate the same .HWS file at around 200kHz
• The Trigger functionality in the NI-HSDIO Express (Generation) function is only used to start generating continuously. Hence it would be sufficient for my application.
• I tried again and the behavior is the same on Labview and SignalExpress

3.2) Looped unsynchronized generation

See folder "Looped unsynchronized generation" in .zip file.

This is the exact same program as 3.1) but "No Start Trigger" is selected on the front panel. This .VI should do the exact same thing as 4), the continuous unsynchronized generation of SPI signals originating from a .HWS file.

However, as shown on Looped unsynchronized generation - Oscilloscope.png the frequency is now around 1.8kHz.

Based on those different tests, I believe that triggering, acquiring data and/or displaying data is not responsible for the low generation/acquisition rates observed (it does have an impact though).

Instead, I think there is something that should be optimized in my .vi in order to get closer timing to what's observed with signal express.

I have absolutely no idea of what I could improve/optimize and that's why I'm now seeking for your help!

In the meantime, I will now work on changing:

• The input from a .HWS file to something similar to example "16-bit Register Swap". This might not be easy because my SPI signals are 48bit long.
• The Output from the current "oscillogram" to actual decoded data.

I’m sure I will come up with new questions on that matter 🙂

Thanks a lot in advance for your help,

Hugues DE CARVALHO

[HuguesThales · Accepted solution]

Hey,

It now works. I don't have time to detail everything here and am not authorized to share my report. Please find the code attached.

Hugues