LabVIEW

cancel
Showing results for 
Search instead for 
Did you mean: 

Generation clock for PCI-6541

We like to use the PCI-6541 to generate data only when instructed by some hardware. This hardware can either give an enable signal that indicates that it expects data or we can gate a clock so that only when this clock line transitions, the PCI-6541 should give data.
 
Gated clock
We have been looking into the documentation and saw (in the NI Digital Waveform Generator/Analyzer Help file, section clocking) that the CLK_IN signal from the connector can be used as Pattern Generation sample clock, but in the PCI-6541 datasheet is mentioned that the clock requirements for CLK_IN are "Clock must be continuous and free-running".
Does this mean that we can not use the CLK_IN with a gated clock for generation? (we can use STROBE for acquisition)
 
Enable signal
I have checked the NI Digital Waveform Generator/Analyzer Help file but there seems to be no provision for a enable generation signal.
There is a pause trigger, but it is unknown to me from the documentation how to continue after pausing. From the documentation it is also not clear to me if a script can be used to minic a level based enable signal (so: generate data while the enable signal is high, stop generating data when the enable signal is low)
 

0 Kudos
Message 1 of 2
(2,562 Views)
Question already answered in the Bursting Data Quickly (PCI-6541) thread.
0 Kudos
Message 2 of 2
(2,540 Views)