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Getting started with SPI

Hello it is my first time using SPI so I'm trying to figure out how to start reading data. I am using an ADC from TI, ADS1278. it is an 8 channel ADC that I am trying to interface with a myRIO. I have read up on what information I could find including example programs, and I wanted to get some advice. I have wired MOSI, MISO, SCLK, and a /DRDY (that toggles when data is ready) wire as well as /SYNC (to sync data to clock) to the evaluation board as seen here. My dilemma is getting started with receiving the data. I have attempted at using the SPI express VI (which maxes clock at 4MHz) to no avail. I have also tried using the low level SPI VI from the myRIO toolkit pallet to the same result (all zeros). Could somebody please tell me what I am missing, I have posted the bit of code that I have put together. Should I take the FPGA approach, and would that allow me to achieve a higher clock freq./data rate or does the myRIO hardware max at 4Mhz? Picture and VI attached. Any help is greatly appreciated.

 

 

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Do you have a sufficiently high-speed oscilloscope you can use to check your outputs from the myRIO board whilst developing? I found an oscilloscope very helpful when I was designing my LabVIEW code to communicate with the LTC2983 (a temperature sensor with SPI communication).

 

I didn't use a RIO - I instead had access to the NI USB-6256 X series DAQ. I'm sure the RIO might be better but I can't give specific advice about using one. 

 

This NI White Paper has some good introductory information about SPI (maybe you already read it) and at the bottom are links to three different implementations - presumably you're using the first but I used the second.

 

In any case, wiring the RIO to an oscilloscope and setting up some sensible triggering would allow you to visualise the waveforms you're sending, and check that they correspond with what you expect. To to just check another stupid question - you do have something plugged into the analog inputs, right? I'm not sure what the behaviour would be if the (input) connections are open, but it might return 0s.


GCentral
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Yes I have used an oscilloscope to verify the clk signal coming from the myRIO.(used the SPI express VI from myRIO toolkit) I have 5V supplied to the analog devices from myRIO. TI provides a program called ADCPro that I have used to verify the correct analog signals are being received. I have not been able to see any data on the MISO wire, so I wasn't sure what else I needed to do from the software side to initiate the data transfer. I don't believe it is a hardware issue with the ADC as I have seen it working in ADCPro. Is there typically something required to initiate a data transfer using SPI?

 

Thanks

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So I tried again to take a look at the VI you linked but I don't have the relevant 'module, toolkit or driver'. I'm downloading the LabVIEW myRIO Toolkit which I'm hoping is the right thing.

 

In terms of what I could see/guess from the block diagram without the help files, I'd guess it looks like you're not sending anything at all to the device - perhaps beyond a single boolean value on the left side of the sequence structure.

 

When I used the DAQmx + SDW library to communicate using SPI, I needed to create a message as a digital waveform and then pass that to some SDW functions which added the appropriate other channels (CS, timing intervals based on the expected clock) and then I output that using the DAQmx Write functions (for 3 different DAQmx Tasks - SCLK, MOSI and reading on MISO).

 

Presumably you don't want to use the DAQmx tasks and it might well be that you also don't need the SDW library, but I would imagine you still need to tell your VI what message you want to send. Based on the documentation for the ADS device you have, do you know the waveform you need to send? I'm guessing that this was sent automatically by the ADCPro software (although it's nice to know that the hardware works and is all wired up properly).


GCentral
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Oops. Ignore most of what I wrote.

 

Looking through the datasheet for the converter, I see that (emphasis mine)

 

The SPI-compatible format is a read-only interface. Data ready for retrieval are indicated by the falling DRDY output and are shifted out on the falling edge of SCLK, MSB first.

and

The conversion data are output on DOUT[4:1]/[8:1]. The MSB data are valid on DOUT[4:1]/[8:1] after DRDY goes low. Subsequent bits are shifted out with each falling edge of SCLK.

 

So, moving forward (and correct me if I'm all wrong again)

It seems like the sequence of events you're looking for is:

  • DRDY goes low. This indicates that data is available.
  • Each time SCLK goes high, read one bit of data from DOUT[ChannelNumber] - after you have 24 of these, you're good to go.

From the datasheet, I think that you have to send only the SCLK signal. The datasheet advises that this be in a ratio of 1:1, 1/2, 1/4, 1/8, ... of the CLK signal, which I think on the evaluation board is set to 27MHz.

 

What do you have wired to pin J4.3 (the SCLK input(?)) My guess is that on the evaluation board, this is somehow connected to the internal 27MHz clock, and that when you have it connected to a myRIO device, maybe your SCLK is not being driven.

 

In that case, you should see the DRDY pulse flipping, but nothing on the MISO/DOUT line. Can you see anything if you connect the DRDY to an oscilloscope/a digital input on the RIO? 


GCentral
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Thanks.

I have not seen my DRDY flipping using an Oscilliscope. I have verifired I can control the Clck signal from MyRIO. The board has an on board crystal oscillator at 27 MHz. Using the SPI express VI there is a limited set of SCLK signals I can generate. 27MHz / 8 = 3.375 MHz, but the closest MyRIO provides is 3.333MHz. I wonder if that difference is acceptable or causing the issue. I've read that one of the most common communication issues with SPI is SCLK so that may be it. I believe from the datasheet that I can provide my own CLK to J4.17, which would max at 4 MHz. The same frequency could be sent to the SCLK that way I know the ratio is 1. I think that would cause my sampling freq to decrease, but data increase if I used 4MHz to both rather than 3.333 and 27MHz.

 

Also SPI Express VI only allows from 8-16 bit transfer, so currently my plan is to choose 12 bit packets and combine sequential data to form 24 bit 2's complement. I don't believe that should be an issue. 

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I have some further questions that might help but I'm not sure exactly how you have the chip set up. I gather it is in an evaluation board, but today I found a different guide to the eval board than yesterday. Can you provide a link that describes how your board is set up?

 

New guesses:

  • CS(bar) has a pull-up resistor, and without knowing which IO pins on your RIO/VI are wired to what, I can't tell if you're setting it low.
  • This guide (today's!) shows a J7.2 GPIO0 START pin in table 2. Although the pull-up resistor here should mean you can ignore it, I suppose it's possible you've set it low (although I doubt it).
  • The same point for your PWDW(bar) inputs - I think these are being held high by the board, and you can ignore them if so, but if not, you need to make this/these (for multiple channels) high.

On the topic of your packet size - 2*12bits should be fine but you might find it easier to use 3*8 - this will fill a U8 and possibly give you an easier time joining the numbers to form your complete value.

If you read them as a binary array, you probably don't need to worry about that though - Build Array will get you what you want.

 

Sorry that I haven't been able to provide a satisfactory answer yet. Hopefully with a little more information about the setup I can take a more useful guess (or you can find the solution).


GCentral
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In reply to your first post - the frequency limit is due to hardware, not the express VIs. The myRIO datasheet (myRIO-1950, but the 1900 is the same) states:

 

Maximum frequencies for secondary digital functions

SPI.............................................................4 MHz

 

 


GCentral
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Thanks. So I have been able to begin pulling data off of the MISO line and repairing using 8 bits at a time. I also tack on an extra 8 bits at the front to complete a full 32 bit in order to prepare for 2's complement conversion with EFSR = +/- 2.5V. (attached jpg) I have not been able to write the code in order to sync the incoming data with the falling DRDY pin. I have been able to verify the DRDY pin is toggling at 105.5kHz. The datasheet you shared is for a different eval board. Thanks for looking around though it is greatly appreciated. Here's the links: Eval Board Link8 Channel ADC (ADS1278).

 

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