12-19-2012 09:00 AM
Been through other posts about this and still haven't figured out what I'm doing wrong. I can't seem to find the HDL Node under an FPGA VI. I outlined the steps I've done below. I seem to have all the FPGA modules installed as well. The only work around I could find was I opened the Example "Using HDL in Timed Loop - R Series" Project and copied and pasted the HDL Node from that VI Block Diagram into mine. This seems to be a pain for what I want to do - anybody have any thoughts on what could be wrong?? Here is my Programming Palette to show you what I see:
STEPS:
Thanks,
Bill
Solved! Go to Solution.
12-19-2012 09:33 AM
Hi Bill,
What version of LabVIEW are you using? The HDL Node has been deprecated for a few years now, and that's why it's no longer on the palettes. To import external IP, we now recommend either the IP Integration Node (IPIN) or Component-Level IP (CLIP). For your reference, useful documentation on when to use each can be found in the LabVIEW FGPA Help.
I DO NOT recommend using the HDL Node for new code development. The reason that it still works is that we keep support for it around is so that we don't break upgraded code. If you absolutely must have support for it for your application, you can do the following:
Again, continued development with the HDL Node is not recommended, and the API has been deprecated for a few years now.
12-19-2012 10:15 AM
I'm using LabVIEW 2012, so that probably explains why it's not available. Thanks for your answer, it was very helpful!! I'll definitely use your suggestion and NOT use the HDL Node.
Thanks again,
Bill