08-18-2025 05:48 PM
I currently have a working LabVIEW program that I would like to deploy onto my cRIO to make it headless (run without a laptop). I have tried to do what I have found on the internet but looks like I still need some guidance. I have provided pictures of the block diagram schematic of my FPGA, FIFO, and RT targets that I wish to execute when the cRIO is cycled on. So far, I have the FIFO configured to "Target-Scoped" but when I try to compile the FPGA it says "The Target Scoped FIFO needs to have both a Read method and a Write method present on the block diagram." I guess my question is, where do I add in the READ FIFO and how should I implement it to my FPGA block diagram in order to allow the cRIO to operate without the use of a laptop?
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08-18-2025 07:55 PM
The target-scoped FIFO is the FIFO between loops within the same FPGA VI.
For FIFO between FPGA to RT, it should be Target-to-Host or Host-to-Target.