How can I access PCIe FlexRIO with Integrated IO RTSI port?

[jiangliang]

Hello, I was using PCIe 57xx with PCIe 1477, both are PCIe FPGA devices.

I have managed to connect these devices together with RTSI Cable, but when I make a pair of simple FPGA code to read/write RTSI port, nothing seems to happen?

I don't know it is because I have failed writing or failed reading? Or is the problem come from PCIe 1477 or PCIe 5763? Anyone can give me some advice?

I really appreciate any help you can provide.

[rolfk]

You have definitely forgotten to attach your VI to your post! 

[jiangliang]

The RTSI reading/writing code is actually simple, I only put these IOs in SCTL and make R/W operation there.

I also had a photo of how these two cards connected, the connection seems right to me.

[rolfk]

Well, a photo is not a VI!!!!

I'm sorry but my eyesight isn't quite that of an eagle and my screen isn't 50" across and your camera angle is pretty bad too.

[jiangliang]

Never mind, I already know what's going on there, FPGA code alone is not enough to access RTSI port, I also need to access FlexRIO API v1 to routing source to RTSI in host VI.