07-05-2011 11:12 AM
I would like to use an FPGA (PXI-7851R) to scan an analog output voltage only when the user presses a "Scan" boolean, to perform this scan only once, and to allow the user to abort the scan at any time by setting the "Scan" boolean to false. I'm having difficulty using the communication between host and FPGA to correctly implement this. For example, I need to be able to set "Scan" to false at the end of the FPGA scan and read this back to the host so that the host VI "Scan" control does not remain true (therefore resulting in a continuously looping scan). One solution I had for this is to add in IRQ in order to read the "Scan" boolean and reset the host user control when the scan completes. However, while the host waits on this IRQ, it can't do anything else; namely, if the user chooses to abort the scan, it's unable to send this command to the FPGA.
Any comments/suggestions would be great. Thanks.
07-15-2011 05:39 PM
I do something kind of similar. What if you made your "Scan" button be "Start scan" and replaced that variable in the inner while loop (and the not) with a "Stop scan" control? The other variable should point to the "Stop scan." Then you wouldn't have the problem of getting stuck inside that inner while loop.
In other words, the user hits one button to start the scan, and then a second one if s/he needs to stop it in the middle. Hope that helps.