How to synchronise FPGA single-cycle loops with other loops inside the FPGA-VI

[Peterpaul]

Hello there,

i need to synchronise several while loops inside an FPGA-VI to a Single-cycle-loop.

These loops need to be active for a variable amount of cycles of the single cycle loop. (In example, the single cycle loop generates a clock and the loops need to be active for a certain amount of clock cycles).

Already tried occurences(Clock sets them, other loop counts occurences and waits till desired number is achieved) but they seem not to work or maybe i used them in a wrong manner.

I hope somebody can help me with this problem.

As an additional question: I need to read data from my FPGA-Vi after this sets an interrupt. Does anyone know the maximum speed this is possible: (I.E, wait for IRQ, after it happens, reading an I32 value and then acklownedge the interrupt and repeat this in a loop, i need to know the maximum execution speed of this loop.)

Thanks for all answers

Message Edited by Peterpaul on 07-05-2007 10:58 AM

[Ken_Tobler]

Hello!

I made a test with a cRIO-9012 and you can tansfer values with Interrups with ~130-150uS from FPGA to RT Host.

For the sychronisation from SingleCycle Loop and other loops, I'm not sure I completely understood what you want to do...
I've made an example which, start another loop every time you push the Toggle and let to other loop run for 50 pulses of the SingleCycle Loop (see Attachemen)

Best regards
Ken