Okay, Brian, I have your answer.
After some close observations on my 2 PXI E-series board in my PXI chassis, here's what I've found.
First, I'm assuming that you're determining the timing between the boards by looking at the time tag AI Read comes back with for the start time.
I used a function generator and sent the SAME signal to both boards. Here is what I found, using the NI examples:
For synching the start times, they both came back with the same data. Therefore, there really isn't a time delay between them (I ran 20 Hz sine wave into the channels, scanning at 1000 Hz for 1 second). I compared the actual values for each board, thinking that if one was off by 2 or 3 milliseconds, I'd see it. The values were identical. Therefore, they really are synched up, but further investigation showed the problem.
When the AI Read VI is called, it goes and gets the current system time, and that's what is used for the start time tag.
Problem is, that *may* not be when the acquisition really started; the data does NOT get time tagged until the AI Read is performed.
To test it, I let the AI Start VI run, then put in a ten second delay. I then watched the system clock run while the VI was going. Lo and behold, the AI Read time tag was the time after the 10 seconds had elapsed, proving the data wasn't time-tagged until the AI Read VI executed.
To continue with this theory then, the AI Read from the master doesn't come back with data until the buffer is full, because it's told to read the entire buffer. So depending on how long that is, the NEXT AI Read for the slave will be "delayed" by this amount of time. By scanning for one second, I could prove this.
So here's my conclusion for your VI: It works properly, just the Time Tag from AI Read is incorrect. Here's what is happening:
Your master AI Read executes. It gets the current system time to tag the data, then has to wait because the buffer isn't full. It waits, then finally gets data. Then your next slave AI Read VI executes, and it gets the system time (which should be the amount of data you're getting from the master, like one second's worth of data) to tag that data. But now the data IS available--the VI doesn't have to wait, so it executes quickly.
Now your other slave AI Read VI executes, but since the last AI Read for the previous slave executed quickly, it's only a few milliseconds after when it reads the system clock to time tag the data. Got it?
I'll bet if you sent a sine wave into every channel and ran your VI, it would be synched.
In my code, I've run my boards as you have, but I never use the time tag from AI Read. I always read the system clock when I start my analog inputs, and then create a time array by adding time to it determined by the scan rate. This is why I never saw the discrepencies that you have.
I'd like an NI engineer to comment on this if possible, because I am sure that this is how it works. If data is time-tagged in this manner, this could really create problems synching data from different boards.
Mark
