10-28-2009 09:25 AM
Solved! Go to Solution.
10-29-2009 06:35 AM
Hello Snamprogetti,
you can try with this link:
How Can I Add My reusable VIs (or FPGA IP) to the FPGA Functions Palette?
Let me know if you encounter any problems,
Best regards
10-29-2009 09:45 AM
Hi Snamprogetti,
The filter VIs will not be added to palettes under the FPGA target. Instead, you design the filter using the VIs under your PC target. Then, once you have a fixed-point filter, you can generate FPGA code from that filter by using the DFD FXP Code Generator VI. You can also generate code from a filter you have saved on disk by right-clicking your FPGA target in a project and selecting Start IP Generator. Select the type of filter you have saved from the resulting dialog and follow the steps to use your filter on your FPGA.
For an example of how to design and generate a filter for FPGA, see the NI Example Finder by going to Help»Find Examples. Then, look under Toolkits and Modules»Digital Filter Design»Getting Started»Tutorials»Generating Code from a Fixed-Point Filter.lvproj. There is a VI that shows how to generate FPGA code using the Code Generator VI.
For more information on the process of designing the filter see the example Designing a Fixed-Point Filter.lvproj.
03-20-2013 06:56 AM
hi Donovan
iam also trying to designing an IIR 16th order chebyshev filter in fpga hardware will u provide any examples which help me.
i obey with your above quote
i being a begineer cant get with that so provide me an example where an DFD chebyshev filter in PC Target can be accessed from aFPGA Target.