If using the Wait (mS) function in a loop, what occurs first -- the wait or other functions?

[SMP_Guy]

I am using Labview 8.2 with a Compact RIO system.  As I am just starting to get familiar with Labview, I have many questions! haha  I will only ask one at this point --  if I have a Wait (mS) in a loop with other code (e.g. FPGA outputs being turned on), what occurs first - the wait or other functions?  I was looking at the timing for a tester of ours and wanted to be sure.  I understand that timing would definitely be determined if a flat sequence was set up, but I didn't want to go to that trouble if the timing is correct as is.  Thanks for the help!

[smercurio_fc]

The only certainty is: Functions will execute when all inputs have been satisfied with data. That's it. This means that there's no way to know ahead of time whether the wait will execute before other functions. In fact, you can have a situation where in one run the wait will execute first, and then on the very next run the other function will execute first. If you absolutely need to establish an order, use the "Time Delay" function, which has error I/O that you can use in place of a sequence structure.

[Matthew_Kelton]

They will run in parallel as long as there is no dependecy between the two code modules.  So, if you put in a 500ms wait and the FPGA code takes 20ms to run, you would have (approximately) a 480ms period in your loop.  The VIs may not start at the exact same time.  So, as the other user stated, use Time Delay which allows you to guarantee run order.

This is on overall issue that new programmers run into.  LV code doesn't run from left to right or top to bottom.  LV code without dependencies may not even run the same way after every compile, depending on how the compiler handles the source code.  It is one of LV's greatest features, but also one of its most dangerous.  I think it's pretty easy to say that every LV programmer has run into a situation where they coded something assuming a run order to find that it didn't run in the order expected.

[altenbach]

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@Matthew Kelton wrote:
So, if you put in a 500ms wait and the FPGA code takes 20ms to run, you would have (approximately) a 480ms period in your loop. 

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No, the loop period will be 500ms.

Both the FPGA code and the wait will start at about the same time. The FPGA code will finish after 20ms. The loop itaration can only finish once all nodes in it have finished, so it will have to wait another 480ms for a total loop time of 500ms.

Try the following:

1. Place a 100ms, a 200ms, and a 500ms wait inside a loop. The loop time will be 500ms
2. Place each in a frame of a flat sequence inside the loop: The loop time will be 800ms.
   

[SMP_Guy]

I appreciate the quick response.  Looks like I'm going to have to do some hacking after all!   Thanks for the help!

[Matthew_Kelton]

I didn't use the right wording.  I meant to say you would have a 480ms period between the end of your FPGA call and the beginning of the next FPGA call.