‎02-19-2019 08:52 AM
Hello, I'm having some issues with the FPGA from a 9149 chassis module. I need to generate to generate two independent square waves for a process, which frequency goes from 0 to 400 Hz. I was trying to do it with the square wave function on the FPGA, and it works fine when I tried just with the first square wave signal until it reach 400 Hz, but when the second signal starts to rise from 0 to 400 Hz, It looks that the frequency of the first signal is affected sometimes going up and down in an irregular behavior, I was thinking that this was due a problem with the type of data, so I proved working with both Single and FXP variable, modifying the FXP's integers bits to 1 bit, leaving 15 bits for the decimal part. I also tried working with a while loop timed structure and with a single cycle timed loop structure in the FPGA, since it seems to be recommended to work the square wave functions inside that kind of structure for synchronization purposes. I still got no results, and I'm really freaking out because I literally don't know how to generate two independents square wave functions which frequency could increase over time.
I attach the VI where I worked my logic, the only thing that changes from one variation of the software from another is using a while loop timer instead of the single cycle timed loop, and each square wave in separates single cycle timed structure. Note: When I worked with timed while loops I separated each square wave into different structures, because If I put the two signals on the same wave, I could only get one square wave in the two Outputs, which corresponds to the lowest frequency between them.
Note: I referenced my program with the National Instrument's example found in the following directory: Rseries/FPGA Fundamentals/FPGA Math and Analysis/Generator/Square Wave.
So thankful in advance
‎02-19-2019 08:56 AM
Hello, I'm having some issues with the FPGA from a 9149 chassis module. I need to generate to generate two independent square waves for a process, which frequency goes from 0 to 400 Hz. I was trying to do it with the square wave function on the FPGA, and it works fine when I tried just with the first square wave signal until it reach 400 Hz, but when the second signal starts to rise from 0 to 400 Hz, It looks that the frequency of the first signal is affected sometimes going up and down in an irregular behavior, I was thinking that this was due a problem with the type of data, so I proved working with both Single and FXP variable, modifying the FXP's integers bits to 1 bit, leaving 15 bits for the decimal part. I also tried working with a while loop timed structure and with a single cycle timed loop structure in the FPGA, since it seems to be recommended to work the square wave functions inside that kind of structure for synchronization purposes. I still got no results, and I'm really freaking out because I literally don't know how to generate two independent square wave functions which frequency could increase over time.
I attach the VI where I worked my logic, the only thing that changes from one variation of the software from another is using a while loop timer instead of the single cycle timed loop, and each square wave in separates single cycle timed structure. Note: When I worked with timed while loops I separated each square wave into different structures, because If I put the two signals on the same wave, I could only get one square wave in the two Outputs, which corresponds to the lowest frequency between them.
Note: I referenced my program with the National Instrument's example found in the following directory: Rseries/FPGA Fundamentals/FPGA Math and Analysis/Generator/Square Wave.
So thankful in advance
‎02-20-2019 11:56 AM
Found this thread: https://forums.ni.com/t5/LabVIEW/Square-Wave-Generation-FPGA/td-p/2888406
Hope it helps
‎02-21-2019 12:15 AM
Jorman,
I don't really see a question in your post so I will answer this question "How can I generate two, frequency-tunable, phase-tunable, 50% duty-cycle, square wave (1-bit out) sources using LabVIEW FPGA?"
To do this, consider using a DDS. A single DDS typically has a Frequency Tuning Word (FTW) and a Phase Word which represent quantized versions of frequency and phase, as you might expect. Below is a snippet which shows how a DDS pair might be constructed for the above question. To calculate the FTW for a desired frequency, please see the equation in the snippet below for FTW. If you change the SCTL clock frequency or the FTW datatype, please update your formula accordingly. For this specific example, I know you are interested in having 400Hz as your maximum signal. Be aware that the DDS I have made can get pretty close to 400Hz but not exactly. What I mean here is that it will be within 9.3 milliHertz of 400 Hz but it won't be exact. There are ways to make it exact but this is beyond what you probably need.