Is arbitration needed for read-only fpga memory?

[pd2]

Am I correct in assuming that arbitration is not needed for fpga memory that is only read and not written?

Message Edited by pd2 on 07-11-2008 12:37 PM

[pd2]

I'm not sure why I haven't got a response. Maybe I didn't ask the question well.

Maybe I should have asked this instead:
Is it ok to have concurrent reads from a block of FPGA memory without arbitration when I can guarantee there will be no writes at the same time as the reads?

[StevenA]

Here is the explination right out of the help file:

If you select the Never Arbitrate option for a resource interface, LabVIEW does not add arbitration components, which saves significant space on the FPGA. In addition to saving space, the Never Arbitrate option allows some of the FPGA I/O and FIFO functions to execute in a single clock cycle. To use the Never Arbitrate option, you must guarantee sequential access to the resource interface in the data flow of the FPGA VI, as shown in the following figure.

So your answer is yes (you can set to Never Arbitrate).  As long as you guarantee serial access to the memory.

Message Edited by StevenA on 07-11-2008 03:49 PM

[pd2]

I saw that, but I didn't understand why I couldn't do parallel reads. In parallel applications on the CPU, it is permissible to have many threads read the same block of memory without synchronization. Synchronization is only necessary when writes are involved. I guess it must be different with the FPGA due to some implementation detail.

[StevenA]

That's what arbitration does.  It addes the extra code to the FPGA that allows you to do the parallel reads.  When you are working at the FPGA level, you are working at a lower (leaner) level than typical CPU programming.