10-03-2011 01:32 PM
Well, I have some bad news
The author of those videos is Ed Doering, he teachs electronics at Rose Ulman college
I talked to him by email about the labview driver for Nexys 2 board, he said that those videos were just one experiment and NI never released a driver for NEXYS 2 board
10-04-2011 12:57 AM
so Labview can support Spartan-3E Starter Kit board only
10-04-2011 08:32 AM
And the Digial Electronics FPGA board as well (even though shown in an ELVIS II, it can be used separately)
Basically, we can't just support each and every development board out there, the maintainence would be too much.
10-04-2011 08:48 AM
Yes, LabView FPGA only supports Spartan 3e starter Kit and the rio Series as well Elvis II, any other board is not supported by labview
10-09-2011 12:06 PM
Today I played with Nexy2 board and can confirm that works with LabVIEW.You must have Xilinx cable, I have a Chinese copy, throws some errors but it works 🙂 It is necessary to modify the ucf file
video
10-09-2011 01:43 PM
How did you do that,?
Could you post some kind of tutorial or something please ?
Diego
10-09-2011 02:55 PM
should not be hard, now I have no time to prepare the files, but I can tell you what is needed to be modify.
1. Install spartan 3e xup labview driver
2. locate C:\Program Files\National Instruments\LabVIEW 8.6\Targets\NI\FPGA\XUPSpartan3E\FPGAFiles\Spartan3EStarter.ucf file
3. Open it width notepad and edit thes lines, basicaly logical names of resources is assigned to the physical pins on the FPGA chip.
View manuals of the boards from the Digilent site for other resources.
Example:
SPARTAN3E-XUP change to NEXYS2
Net "sys_clk_pin" LOC="C9"; -> Net "sys_clk_pin" LOC="B8";
Net "LED5" LOC="D11"; -> Net "LED5" LOC="P15";
Net "LED4" LOC="C11"; -> Net "LED4" LOC="C11"
Net "LED3" LOC="F11"; -> Net "LED3" LOC="K14";
Net "LED2" LOC="E11"; -> Net "LED2" LOC="K15";
Net "LED1" LOC="E12"; -> Net "LED1" LOC="J15";
Net "LED0" LOC="F12"; -> Net "LED0" LOC="J14":
Net SW0 IOSTANDARD = LVTTL | PULLUP; -> Net SW0 IOSTANDARD = LVTTL;
Net SW1 IOSTANDARD = LVTTL | PULLUP; -> Net SW1 IOSTANDARD = LVTTL;
Net SW2 IOSTANDARD = LVTTL | PULLUP; -> Net SW2 IOSTANDARD = LVTTL ;
Net SW3 IOSTANDARD = LVTTL | PULLUP; -> Net SW2 IOSTANDARD = LVTTL ; pay attention to this!
This is just for the LEDs on the nexys2, for the keys do the same etc...
5. Save the file
6. You can also modify this file.
C:\Program Files\National Instruments\LabVIEW 8.6\Targets\NI\FPGA\XUPSpartan3E\resource.xml
Watch out that the logical resource names correspond to logical names in theUCF file.
7. Create a LabVIEW FPGA project for Spartan 3e XUP
8. Create a FPGA VI, compile, connect Nexys2 board with Xilinx USB JTAG cable and tray tu run it.
I hope you will succeed
10-09-2011 04:09 PM
I will try this until next two weeks, cause I don´t have the board until that date
if someone has this board please try it and comment for us if this works 🙂
09-27-2012 02:49 PM
Hi. Is the Nexys3 board (with spartan6 FPGA) compatible with the FPGA module???
Thank You
09-27-2012 07:06 PM
There are no plans to support that board currently