LabVIEW FPGA VI compilation -timing errors

[ramyasree]

I have code in different Single cycled timed loops of 60 MHz, 40 MHz, 100 MHz with NI streaming code.

when I am trying to compile it for PXI-5840 using NI cloud compiler, it is giving timing errors.

Individual SCTLs loop are compiling fine.

When combining the both , I facing this issue.

In the timing violation window, it showing non-diagram component in Streaming code.

I am not sure where I have to optimize?

I tried reducing the clocks rate and checked. still issue remains.

By changing implementation strategy  xilinix options , Can I solve this?

thanks in advance.

[Terry_ALE]

Can you confirm that you are recompiling for the VST (5840)?

Can you provide more details such as screenshots of the failures.