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Labview FPGA 2018 Crio 9045 - problems with generating intermediate files with an array constant in block memory

Hey all,

 

I have a problem with some code where I have an array constant, for which I selected block memory implementation:

  • If I use an index array function on the array, and attach an indicator / write to an FPGA register, I get the following error message:

The array could not be implemented using the resource type specified. This occurs when either Block Memory or Look-Up Tables is selected and the usage of the array does not meet the limitations of the resource. Restructure the array in order to obtain the desired implementation or change the FPGA Implementation option to Auto.

  • If I don't attach an indicator / write to a register, generating the intermediate files runs fine.

 

You can find the vi attached to this post.

Does anyone know what I'm doing wrong / how I can fix this?

 

Thanks in advance!

 

K.r.

Pieter

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Hi Pieter,

 


@PieterDV wrote:

I have a problem with some code where I have an array constant, for which I selected block memory implementation:

  • If I use an index array function on the array, and attach an indicator / write to an FPGA register, I get the following error message:

The array could not be implemented using the resource type specified. This occurs when either Block Memory or Look-Up Tables is selected and the usage of the array does not meet the limitations of the resource. Restructure the array in order to obtain the desired implementation or change the FPGA Implementation option to Auto.

  • If I don't attach an indicator / write to a register, generating the intermediate files runs fine.

 

You can find the vi attached to this post.

Does anyone know what I'm doing wrong / how I can fix this?


Do you really need an array of 10k elements in the FPGA? Which kind of tooth do you want to count?

What is the purpose of all this? (Maybe we can suggest other ways to solve your problem…)

 

Btw:

  • "I32 modulo 4" is the same as "I32 AND 0x03", but the 2nd is much simpler for your FPGA!
  • "I32 modulo 8" is the same as "I32 AND 0x07", but the 2nd is much simpler…
  • it seems you mixed up the datatypes for "event" and "chID" in your FXP cluster used in this FIFO…
  • do you need exactly 10k elements in your array or would 8192 elements also be sufficient? This would simplify the modulo operation the consumer loop…
  • Your array is defined as 10k elements of FXP<+,2,2>, which is just 2 bits per element. Have you tried to store those bits in an array of 2500×U8 or 1250×U16 or 625×U32 or 313×U64?

General suggestion:

When discussing problems with RT or FPGA VIs it is important to also provide the LabVIEW project file (lvproj) for these VIs as that contains all the resource definitions!

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Hi Gerd,

 

First of all thanks for taking a look and answering!

 

Indeed, I have noticed that I did miswire the two ch_id & event fields, however this vi is purely for demonstration purposes.

Given the modulo, that is just to showcase that the elements we write in the fifo are dynamic.

 

In reality, we would need much more data to retain, but given the NDA I cannot discuss this in more detail I'm afraid.

 

I was just wondering what difference it made connecting the output of the index array function to a register / indicator i.s.o. not using it (which allows for intermediate file generation).

 

If you need more information (as you suggested), please let me know and I'll try to provide a better demo vi.

 

K.r.

Pieter

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