Limitted Gain PID

[Rayden]

Hi Gerdw,

Please more détails what the différence so like this linked here  ! !

[GerdW]

Hi Rayden,

why don't you use Ctrl-U before uploading images of your VI-BD?

What's the problem in using some multiply functions in your VI? Do you really need an example of a multiply?

[Rayden]

Yes please i need a simple VI_exemple wich contain FPGA_PID with multiply scale to exceed 128 limit.

thanks

[Rayden]

no answer !!!!!!!

i need help

[nathand]

What have you already tried? Have you looked at the help to see how the PID gains are normalized? What is the range of your process variable? What do you need the range of the output to be? What are the units of the input and output? Why do you think you need such large gains - especially for the proportional and integral components?

[Rayden]

For controlling my system in PID designing methode  i need  values largest then 128 , i wana introduce proportionnel and  integrale Kp=200 ; Ki=1500

i use PID_FPGA .

i don't know ho to choose out put range wich criteria used in the choice.

input  référence is 25750 means set point, you find schéma labview attached in the first page published.

thanks for advice i'am blocked from more than 2 weeks.please !

[nathand]

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@Rayden wrote:

For controlling my system in PID designing methode  i need  values largest then 128 , i wana introduce proportionnel and  integrale Kp=200 ; Ki=1500

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How did you determine that those are good PID values for your system?

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@Rayden wrote:

i don't know ho to choose out put range wich criteria used in the choice.

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To what are you connecting the output? What are you controlling? In the code that you showed, the output is connected to an indicator. Eventually that value needs to connect to some part of your process (a valve, a heater, etc) to control something. What is the range of that control element?

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@Rayden wrote:

input  référence is 25750 means set point, you find schéma labview attached in the first page published.

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What are the units of that 25750? Where does it come from? What is the range of the process variable ("Ubus" in your code)? One common way to handle this is to deal in percentages. You scale the input and the setpoint to a percentage of the overall input range. You can do the same for the output - select your gains so that the output is a percentage of the full-range of the control element. After the PID block, you scale the percentage to an actual output. A range of +128 to -128 lets you capture 100% to -100%.

[Rayden]

First, desining method its from sisotool toolbox of MATLAB.i tested my system in simulation with small values and  i'am sure that value upper thant 128 will improve performance of the system wich is DC/Dc converter thinks to simulation results .

Second, the out put will be conected to onther PID in series and then to duty-cycle, but détails is not important the most important things its how to convert from PID gains to have superior value then 128.

25750 its came from voltage sensor it's équivalent to 16 Volts.

I don't understand also your solution you can join me a VI please. i see someone wich said i must do a cast to gain variable. it's possible !!! and how !!!

i always don't receive enough responce can you send me customer function VI wich do this to inject its directly in my Main VI. and Thanks a lot .

[nathand]

Sorry, I do not have a VI I can attach, and even if I did, it would only be the PID block with some multiplication or bit shifts before and after it.

Are you sure that you can take the gains computed in Matlab and use them directly in LabVIEW? Look carefully at what exactly Matlab calculates, and how the LabVIEW FPGA PID normalizes gains.

If you look at how LabVIEW uses the gains, you'll see that Ki (integral gain) includes Kc (the proportional gain) as a factor. This means that you can divide both gains by any number that gets the gains to the correct range, then multiply the PID output by that same number, and get the same result (ignoring any loss of numerical precision). The easiest way to do this is with a bit shift (multiply/divide by a power of 2). Here you can achieve the same result by reinterpreting the same bits as a fixed-point value instead of an integer - that is, for your Kp of 200, don't change the value at all, just cast to a fixed-point value. Then, after the PID output, cast back to an integer.

[Rayden]

for example if i want to implement  this controller  giving by Matlab  C_controller = 1178.5 (1+0.0038p) / p

wich implement in PID FPGA gains  Kc=1178.5 and Ki 0.0038  knowing that  simple time loop is 100 µs.

it's great ? or i muste calculate Kc*Ts/Ti  and integrat it in interface gain value ??!!

see linked picture can you tell me wich value must introduce ?