04-17-2015 09:34 AM
Hey Guys,
I have to program a lock in amplifier for an analog signal i get from a microphone with a high SNR.
I have Labview 2012 SP1 and FPGA/RT 2012 and a SBRIO 9636.
I found an example: https://decibel.ni.com/content/docs/DOC-1762
Now I am trying to understand the mostly uncommented code.
Question 1:
Can I use this program with my SBRIO? I prefer this to the SBRIO version on the same page because it is a dual phase LIA.
Question 2:
I added my own zip file were I added some comment boxes (orange background) but I commented in german. Maybe you can tell me if I am right so far. (Mainly in the HostLIA.vi and FPGA_LIA.vi)
Question 3:
Can someone help me to understand the subvi on the FPGA named "costa loop"? For example: What exactly is the code doing in the VCO subvi?
Question 4:
Can someone give me a link to a good document/website which explains the mathematic details of the decimation in a LIA?
(german or english)
If someone has another good working lock in program, please tell me.
Thanks for your help
Stefan
04-22-2015 04:24 AM
Hello Slev1n,
here is some documentation about the Lock in Amplifier (mathematically):
http://www.thinksrs.com/downloads/PDFs/ApplicationNotes/AboutLIAs.pdf
in general it is possible to configure a cRIO project to a sbRIO project. You just need to configure a new target.
Regards, Elli