Maximum frequency of C interface to FPGA communication

[prashant.rao]

Hi Guys,

First of all I would like to thank Labview team for coming up with this fantastic addition. The C interface makes my life a lot easier as I already have all my other devices integrated with C/C++ on linux RTAI.

Now to get on to the question, What is the maximum deterministic frequency at which the C API can communicate? I have a simple FPGA PID block based single PID loop + PWM generator + encoder decoder (on an sbRIO). I don't have any FIFOs or arrays, I am just using the setpoint as a single integer input which I multiply/divide to the accuracy that I want as my only control.

With RTAI, when I timed the C loop, it gave a very highly deterministic loop frequency of 500hz and at higher frequencies, the jitter increased on my C loop.

So, do you guys have a maximum frequency at which C interface can communicate with the RIO device?

Thank you for your time.

Prashant

Note: My RIO is connected directly to the PC with static IP settings.

[_Tim]

Hi Prashant,

Which C API are you using? Is this CVI Real-Time or a different API?

[prashant.rao]

Hi Tim

I am using the FPGA to C API generator in windows and then using the generated headers and functions and compiling in Ubuntu, where I have the RIO drivers installed.

Prashant

[Chris.N]

Prashant,

We do not have a defined limit at which the C Interface can communicate with the RIO device because this varies with the system.  In your setup, you are connecting your Linux machine to the cRIO through Ethernet, which is non deterministic.  Therefore, you will need to experimentally determine the loop rate which achieves the determinism you are trying to achieve which you have already done.  If there is too much jitter at a certain rate for your system, then you will need to decrease the loop rate.

Cheers,