Program structure slowing down reading speed?

[RvdG]

Hello,

I am developing a program for a data acquisition purpose. The program is to be implemented on an sbRIO-9606.
Attached is a file containing the part of my program that is of interest for answering my question.

The data generation loop and data communication loop run in parallel. The user vi in the data communication loop is a set of enum variables that is set in the communication loop with the pc (also running in parallel, not shown in the figure). The other user vi is a circular buffer consisting of an array of 1000000 INT16's.

The data generation loop is for testing purpose only and will be replaced by the fpga module to receive the actual data.
The data communication loop reads from the circular buffer and and sends it over a tcp connection the pc.

The problem now is that my data througput over the connection is lower than expected and this is caused by the fact that reading from the circular buffer takes a lot more time than expected. The reading from the circular buffer was isolated and tested and turned out to take in the order of microseconds while in the program it takes orders of magnitudes longer. Also varying the buffer size and read chunk size did not make a difference.

I'am sure the problem is in the reading from the circular buffer since replacing the reading from the buffer by a initiated array solves the problem. So now my guess is that somehow there is unwanted interference between the 2 loops in the circular buffer, slowing down my reading speed.

Can somebody explain to me what is slowing down my program? And can somebody tell me the expected reading and writing speeds to flash memory of the sbRIO?

Thanks in advance,

Rick

[RvdG]

If it is necessary I can also post the schematic of the circular buffer itself, but I am mainly interested in the possible interaction between the writing and reading in the two loops. 

[ThiCop]

Hello RvdG,

Am I correct to assume that the buffer is an FGV?

Is there a specific reason why you're not using an RT Fifo to transfer data from one loop to another.

I would also advise you to use dataflow instead of Flat Sequence to induce a certain flow of data.

Also note that while loops with normal priority VI's inside have lower priority than Timed Loops.

Have you already compared how often the Timed Loop is being executed compared to the normal While Loop?

My guess is that the normal While Loop is starving and therefore your reads are going so much slower in that loop.

Unfortunately I'm only able to "guess" without having the actual code.

So if you could share the top level VI and the circular buffer VI, this would allow me to be more sure about what's going wrong.

Can you also share the code that was used for the benchmarking?

[Ben]

have you tried using a queue instead of the Circular bufffer?

As written the while loop will run as fast as the TCP function will allow but the data generation will fall behind.

The performance hits you are seeing are probably due to a a buffer copy to move teh data into the circular buffer and another buffer copy to get it out.

Depending on how you coded you circular buffer there may also be some delays for memory allocating inside the circular buffer.

But first try the queue. THey can transfer data in-place and with some small changes, the tramsmit loop will wait for new data to get queued up rather than running ahead.

Tip:

Use Tools >>> Profile >>> Show Buffer Allocations..."

Spoiler

Alt-t p s is the short-cut

to SEE where the buffers are being created.

Ben

[Mark_Yedinak]

Also, if you are using a FGV only one task can access that VI at a time and it will block any parallel tasks from running. It is a shared resource and will only allow one task to access it at a time. As sugested, use a queue to transfer the data.

[ThiCop]

Hello RvDG,

If any questions pop-up, then please let us know.