08-16-2021 04:06 PM - edited 08-16-2021 04:07 PM
Hi, I have a vi that produces PRBS pattern values (pseudorandom binary sequence). I would like to repeat every value that is output n times (change the clock frequency to >1). I'm using a counter and a true/false switch to do that (left top in the picture), but it feels clumsy and is very slow. Does anyone have an idea how to do it better?
I'm attaching the snippet and the vi (it needs to be embedded in a simple while loop to work).
The false case is empty except for the output wire being fed back to itself through the delay node.
08-16-2021 04:22 PM
What do you mean by its slow? How much do you target and what is the actual execution time?
The implementation is simple and straight forward, it would definitely limited by OS' performance
If you're planning to generate this PRBS sequence as an HW signal, best to implement this on an FPGA or raw logic chips to get the best performance.
08-16-2021 04:29 PM - edited 08-16-2021 04:30 PM
So this is a part of a large simulation (in fact I have an FPGA board generating it!) and when this module is switched off, it runs at about 7 kHz on my laptop. When I switch it on, it drops to 600 Hz.
Inspired by your question, I tested the speed with the repetition module and without it, and the speed is the same, so I guess the PRBS generation itself is responsible for the performance drop.
08-16-2021 06:57 PM
Could you please provide a block diagram representation of how this VI fits into your whole simulation system?
If it is running on FPGA, it will run as per the Clock rate and should not be affected. I would personally not rely on Windows for tightly timed simulation.
08-17-2021 10:23 AM
The block diagram wouldn't fit on the page 😉 it's very large and complex. It's a part of a coupled nonlinear equations solving program, where the PRBS signal modulates the phase of one of the terms in one nonlinear equation. So every iteration of the while loop, a new sample from the PRBS block is generated and fed into the NLE solver block. The program is allowed to run as fast as possible, that's why I know what's the impact of switching the PRBS block on - I measure the simulation speed as defined by while loop iterations per second.