Hi Lucas,
I assume you are using the Digital IIR Filter.vi. The logic is not immediately obvious on the diagram of the instances of this VI, but there are two sorts of reset that can happen, namely a coefficient redesign, and a filter state reset. The coefficient redesign happens when either:
1. It is the first time the VI has been called
2. The reset control (on Digital IIR Filter.vi) is true
3. The dt value of the waveform changes from the previous iteration
4. The design specifications change from the previous iteration.
The filter state reset (which is what you want I think) will happen:
1. If there has been a coefficient redesign
2. If the timestamp of the last point of the previous waveform does not match the timestamp of the first point of the current waveform + dt. This is basically an assumption of continuity of the waveforms over consecutive calls to the VI.
I think you have two choices to get the behavior you want. First, you can use the continuity of the waveforms as a way of controlling the reset of the filter state. When you want a reset, then make the current waveform discontinuous. The second option would be to use the lower level VIs on the signal processing->filters->IIR palette. This allows you to explicitly separate the design and implementation of the filter on your diagram, with explicit reset control on the filter states.
