SIne generation with fpga

[Cyco]

Hi,

I am working on a large project on labview FPGA but I'm a beginner in FPGA methods. The first step is to generate a sine wave in "real time" through one of the output of the PXI card.

I chose to use a LUT, but I don't really know if it is the best way. My problem is that my output signal is not a sine and I dont know why.

I joined a printscreen of my diagram. The "waveform" memory contains 1024 points and the hardware I use is a flexrio PXIe 7965R with a 5781 module

If someone have an idea 🙂

P.S: sorry for my poor english 🙂

[Cyco]

I forgot:

- I dont want to use the host for the generation. This must be done with the FPGA. No need to interaction between FPGA and HOST.

- Of course, the memory "waveform"  (LUT) is initialized with a 1024 point sine.

[Cyco]

anyone ?

[JérémyC]

Hello,

Why do you espect reading a sinus if you only read values of many adresses of Memory Item?

The 5781 is Baseband Transceiver Adapter Module for NI FlexRIO not a module.

I suggest you to take a look at this link : Generate sinus in FPGA

You also can use this function :

Regards,

[Cyco]

Thank you for your answer.

I am now using the "sine wave generator" with "normalize signal generation parameters" and I succed in generate a sine wave. But now, I want to modulate in real time the amplitude of the sine and there is no way to do that directly from the "normalize signal generation parameters". 

The main problem is that the output of the "sine wave generator" is an integer. I suppose I have to divide this output by a power of 2 to modulate the amplitude of the wave, but this operation give a float and cannot be forwarded to the DAC.

An idea ?

[JérémyC]

Hello,

What do you call "DAC" and which type of value for the "DAC" is required?

Regards,

[Cyco]

hello,

What I call DAC (digital to analog converter) is the output of my hardware device.

I am sending I16 datas (the sine wave) to this converter which give me an output analog signal of 1V max.

My question is "how to properly divide the amplitude of my signal in real time".

For now, I divide the I16 that is given by the "sine wave generator" by a power of 2 using "quotient & remainder". I know this is not a good way to do that since the division does not necessarily give an integer and the amplitude decrease is not linear.

My problem is:

I want a output sine wave of 1V(rms) amplitude which can be decreased progressively and accurately (for instance by 0.01V steps) and I do not see how can I do that properly.

Thanks in advance for your answer.

Cyril

[majoris]

Use the Quotient / Remainder function with only integer inputs.

I'm kinda surprised you can drop a VI on an FPGA diagram that the FPGA doesn't support...

[bmann2000]

the only way you can achieve this on FPGA is to use a very large Look-up-table (LUT), this may limit the available space left over for other functions.

if your limited by the max number of elements in the LUT VI, you can cheat a bit by only storing 1/4 of the sine wave, then flip/reverse as required based on the look up address to achieve a full sine.