Several CRIO in the same project

[Jorge_Amaral]

Hello to all,

I'm working in a project that has several CRIO's but they all have the same code. So... I got a project that include all the CRIO's. Till now i was working only with one. Yesterday I create the new CRIO target and dragged the Main code to it. When  I saw the code, I discovered that it's necessary to relink to the FPGA code. Ok... No much work on that! But after this, All the subvi's became into error state saying that FPGA reference type was incorrect.

This is a scary idea, because the system wil consume a large number of CRIOS (maybe 10 or more) and when I modify the code I need a quick way of refreshing the entire system.

Can anyone help me on this?

[JMota]

Hello Jorge,

First of all, what do you mean by having to relink the FPGA code? Also, what exact steps took you to get to the "FPGA reference type was incorrect" state?

In any case, I have a few suggestions for you. If your systems are hardware and software-wise identical, you are probably better just developing FPGA code under only one of them, and then using the Open FPGA Reference node in your host VI to point to a bitfile instead of a VI.

Depending on the type of application you are doing, you could also do it with having a single cRIO in the project and going to its properties page to change the IP of the controller it points to in order for you to do things to a different controller. This is not useful in many cases, but in others it could save you work.

Lastly, if you are using LV 8.5 or earlier, configure the Open FPGA Reference so you can pass in a resource name (in the cRIO case: RIO0), so it always talks to the local FPGA.

Hope this helps.

JMota 

[Jorge_Amaral · Accepted solution]

Hello and thanks for your good post!

For the moment I think my problem is solutioned due to your tip of pointing to the "bitfile" and using the resource name.

I'm going to do some more tests to check if it's ok. But it looks good!

Thanks again!