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Simultaneous AO/AI on multiple boards using GPCTR out ck via -RITSI

My system contains:
Dev 1 - PCI-6123 S series 8 ch board
Dev 2 - PCI-MIO-16EX-10 DAQ board
Dev 3 - PCI-MIO-16EX-10 DAQ board
All three boards have a RTSI cable connected between them. RTSI cable is enabled for all 3 devices.
Using  LV 8.2.1 Professional Development System and NI-DAQmx 8.50f5
 
I have an application which I need to do a 6 ch AI on the Dev 1, PCI-6123 S series board. At the same time I need to do a simultaneous AO on 3 ch's using two AO's from Dev 3, MIO-16EX-10 and one AO from the Dev 2, MIO-16EX-10 board. Finally, all the data AO and AI will be clocked using the GPCTR0 output of the Dev 2, MIO-16EX-10 board. This clock functions both as the clock for the AO/AI and as a step pulse signal going to a stepper motor.  The maximum clock rate <10Khz. I am attempting to route the Dev 2, GPCTR0 output via RTSI to Dev 1 & Dev 3 using the RTSI bus. I envision hardwiring the Dev 2, GPCTR0 output to one of the PFI inputs ie Dev 2, PFI-7 Startscan. I would then route the clock signal to the Dev 1 ,PCI-6123 AI clock, Dev 2, MIO-16EX-10  AO clock and Dev 3, MIO-16EX-10 AO clock.
 
I am having difficulty figuring out how to route the signal to all the points that it needs to go. Using the "Multi-Device Synch-Digital Signal Routing via RTSI.vi" example I seem to be able to route the Dev 2, PFI-7 Startscan to the Dev 1, AI Startscan. However, once I do this I the step pulse generator vi that generates step pulse on Dev 2, GPCTR0 gets an error saying routing is illegal. 
 
Has anyone tried to route a single signal to multiple targets like this?
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Hi John,
 
Synchronizing over the RTSI cable shouldn't require a lot of explicit routing.  It sounds like your application architecture is using two VIs: one for your counter and another for your AI/AO operations.
 
If that's the case, then you should export your counter's internal output to RTSI 0 with the DAQmx Export Signal VI. If you don't see /Dev2/Ctr0InternalOutput in the drop-down list, then you should right-click on the control, choose I/O Name Filtering and verify that the Include Advanced Terminals box is ticked.
 
Then, in your AI/AO VI, specify RTSI 0 as the source for the sample clock. Provided you start the AI/AO VI before the counter VI so that it's waiting for the clock, once you start the counter VI, everything will run synchronously.
 
What was the specific error message and code you received?
Joe Friedchicken
NI Configuration Based Software
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Principal Software Engineer :: Configuration Based Software
Senior Software Engineer :: Multifunction Instruments Applications Group (until May 2018)
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)
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Joe,

Thanks for your feedback. I have my application about 80% working now. I had apparently created much of my own problem. Using the "Multi-Device Synch-Digital Signal Routing via RTSI.vi" example I had attempted to create several routings between boards on the RTSI bus. As a result I had many conflicts of routes that I didn't realize I needed to disconnect before attempting to connect another routing using the same IO pins.

 Also, I didn't understand that LV allowed me to point to the other boards signals using the Clock Source input of the DAQmx Timing (Sample Clock).vi.

The only part I have left is to set up the two EX-10 boards to do a 3 ch simultaneous waveform output. I need to generate a 3-Phase sinewave (120 degree phase shifted) on these 3 outputs. I don't think this will be too difficult now that I understand the RTSI routing.

johnfr

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@johnfr wrote:

Also, I didn't understand that LV allowed me to point to the other boards signals using the Clock Source input of the DAQmx Timing (Sample Clock).vi.



Yes, DAQmx can automatically route signals for you once the boards have been configured in MAX to use the RTSI cable.
Joe Friedchicken
NI Configuration Based Software
Get with your fellow OS users
[ Linux ] [ macOS ]
Principal Software Engineer :: Configuration Based Software
Senior Software Engineer :: Multifunction Instruments Applications Group (until May 2018)
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)
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