Hmmmmmm. Some other responses came in while I was queuing up mine. My answer is quite a bit more complex, but I think the complexity is necessary to accomplish what I *think* you're looking for. Let me define what I *think* you're looking for:
Q: Given an incoming pulse train with unknown pulse width, make a program that will produce a single output pulse that coincides with the 1st input pulse very precisely (same pulse width, no delay).
A: My solution outline below will produce the same pulse width and a minimal, hardware-deterministic sub-microsec delay. The output pulse will coincide with the 1st input pulse if the program starts before the input pulse train. It will coincide with either the 1st or 2nd *full* input pulse if the input pulse train is free running before the program starts, depending on the phase of the input when the tasks start.
Ok, on with my original post...
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A high-speed & accurate solution is gonna be trickier than you'd expect, mainly because most DAQ hardware-timing capabilities are only sensitive to 1 kind of edge at a time, either rising or falling but not both. The main exception I know of is digital change detection. Here's an outline of what you'll need to do:
1. Create a DO task, start it, write a low state to your output pin, then stop and clear the task. This sets the initial state of your output pin low in case the power-up state had been high.
2. Configure a DI task where DAQmx Timing is configured to use change detection. You can make it work with either Continuous or Finite Sampling, I'd probably opt for Continuous.
3. Configure the DI task to be sensitive to both rising and falling edges of the incoming pulse train.
4. Create a new DO task for your output pin. Configure DAQmx Timing for Finite Sampling and # samples = 2.
5. For your DO task, define the Sample Clock 'source' input to DAQmx Timing to be something similar to "/Dev1/ChangeDetectEvent".
6. Use DAQmx Write to write 2 DO samples to the buffer -- a high then a low.
7. Start the DO task.
8. Start the DI task.
9. Wait for the (finite) DO task to complete
10. Stop and Clear both DO and DI tasks.
Once the DI task has started, every observed transition on the configured input pin will result in a "change detection event". The DO task uses these as a sample clock. The first transition (presumably rising edge of an input pulse) causes a high output, the second one causes a low output. The DO task is now done as it was configured for 2-sample Finite Sampling.
Believe it or not, that was actually a *minimal* best-case set of instructions which will work for the specific case that you can start your program at a time when you know the input pulse train is idle. If the pulse train can be already present when you start your program, you'll need to add the following:
11. Configure a trigger for your DO task. Set it to trigger off the trailing edge (probably 'falling') of the signal named something similar to "/Dev1/ChangeDetectEvent".
12. Configure the DO task's sample clock to be active on the leading edge (probably 'rising') of the same signal.
This makes sure that whatever state the input pulse train is in when you start your program, you don't trigger the DO task to start until seeing the *end* of the 1st change detection pulse and you don't generate any output samples until you see the beginning of the *next* change detection pulse.
-Kevin P
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