Re: Standalone cRIO‑9053 with NI‑9215 & NI‑9467 for UTC‑Timestamped Data Logging - NI Community
I posted this question awhile back and had a horrible understanding of what I was doing I now have a little better understanding of what I am doing, thank you GerdW and Zyong. I currently have the FPGA doing what I want it to do except the timestamp is one sample behind. On the RT side I am trying to save 4 channels of data (sampling at 100Khz) to a TDMS file (i can change it depending on what you guys recommend), timestamp of first sample needs to align with PPS within nanosecond precision, I think I just have to add a frame in the middle of the lower part of my FPGA code that just waits for PPS to do that... On the RT side I do not need to stream data to or from my PC as this system will be headless. I would like to know what structure (while loops) I can get rid of on the RT side, and what else i need to do to make this system headless.
P.S. if there is a way i can stream the data to a raspberry pi that would also be very cool instead of saving to a TDMS file.
