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State machine problem

Hi,
This is my first attempt to use state machine  in my project. I adopted the standart machine from LV. I tried to add a new frame "Hardware Init" and LV started to give me an error which has to do with the ENUM value. Could someone explain how to properly add states to my state machine? Also I would like to know how to make sure that all inputs will be on the left and all outputs will be on the right, so that my wires will stay neat and  program will be easy to read. Thanks.


Message Edited by RSibagatullin on 06-25-2008 02:20 PM
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Open the Typedef of the State control. Edit that to add the desired states. Then additional cases can be added to the state machine. Context-click on the border of the case structure and choose "Add Case for every value. This will create an empty case for each value of the state enum which does not already have a case. It will not remove cases which do not match the enum. Another way is to duplicate an existing case which contains code similar to that which will be used in the new case. LV will assign the first unused enum value to that case.

Lynn
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So how should I pass signals from on state to another so that my wires will stay always from left to right.  Should I use shift registers?
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Sure. You can use a single shift regsiter and a bundle/unbundle by name.
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But I don't know how many exactly wires should be in the bundle at this stage.  And what are the benefits of using bundle?
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Well, as part of your design process, you should have a pretty good idea of the data structure before you start writing code (at leas in a perfect world). Even if you don't, using a strict type def as a control makes it simple to modify the structure when need.

Using a cluster keeps the data in a single wire - less cluttered diagram and more difficult to make wiring mistakes. Using Unbundle and Bundle by Name also reduces errors and makes the program more self-documenting.



Message Edited by Dennis Knutson on 06-26-2008 11:29 AM
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