Synchronize DSA (9230) and SAR (9223) module

[cordm]

Hi everyone,

looking at this tutorial and this thread I managed to synchronize an NI 9230 with a NI 9223. My problem is that I cannot get to 1 MHz sampling rate for the 9223. DAQmx gives me error -200332 and says that the maximum sampling rate 936 kHz. Is it possible to get to 1 MHz sampling rate? The modules will be used in a cRIO 9047, currently I am using a simulated cDAQ 9189. I thought I could use a cDAQ clock but that results in another error (Error -200414, invalid clock source).

[GerdW]

Hi cordm,

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@cordm wrote:

My problem is that I cannot get to 1 MHz sampling rate for the 9223.

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Did you read the datasheet for this module?

It says you need to use the FPGA to reach 1MS/s/channel…

[cordm]

Well that would be annoying.. I did read the data sheet, but it does not list the maximum sampling rate for real time (DAQmx) mode. It is listed  as compatible with real time mode. I couldn't find any indication that it is somehow limited so I would be pretty surprised if it couldn't reach full speed.

[GerdW]

Hi cordm,

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@cordm wrote:

I couldn't find any indication that it is somehow limited so I would be pretty surprised if it couldn't reach full speed.

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The module can reach full speed according to the specs in the datasheet (by using a cDAQ or FPGA in streaming mode)!

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@cordm wrote:

DAQmx gives me error -200332 and says that the maximum sampling rate 936 kHz.

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When DAQmx gives you this exact error description then it seems limited to less than 1MS/s…

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@cordm wrote:

I thought I could use a cDAQ clock but that results in another error (Error -200414, invalid clock source).

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You  cannot use a cDAQ clock in a cRIO. And accessing internal features of simulated devices is not guaranteed to succeed…

Did you already test this on your real cRIO device?

[cordm]

Sorry, I'll try to be clearer.

I want to acquire data from a 9230 and a 9233 in a cRIO 9047 at 12,8 kS/s/ch resp. 1 MS/s/ch using the DAQmx interface. The acquisition should be synchronized.

Since I don't yet have the hardware around, I'm using a simulated cDAQ 9189. For synchronization, I share the 9230 timebase with the 9223 as in the linked thread. This limits the sampling rate of the 9223 to 936 kS/s/ch. Without synchronization, 1 MS/s/ch is possible.

So I thought maybe I can achieve a higher sampling rate if I use the cDAQs clock as timebase for both modules. That gives me an invalid clock source error. Is that a limitation due to device simulation? Or is it a genuine limitation and I need another way.

I will test it when the cRIO arrives.

[Kevin_Price]

It appears that your max sample rate of 936 kHz arises because DAQmx chooses the nearest timebase divisor such that the sample rate will be <= 1 MHz.   In your case, the Delta Sigma device has a 13.1 MHz timebase, so DAQmx is choosing 14 as the divisor.   A divisor of 13 would lead to a 1.008 MHz sample rate which DAQmx rejects.

So, trick it!  Lie!

Expand that timing property node so you can directly specify a timebase divisor of 13.  Lie to the SAR device task by telling it that the external timebase rate is <= 13 MHz.

CAUTION: this has side effects.  Your waveform timing info will be based on the lie you told to get the hardware to do what you want.  You'll need to correct the timing info downstream somewhere.

-Kevin P

[mcduff]

Are you doing this in FPGA or DAQmx in RT?

This will affect how you do the synchronization. As @GerdW has said, DAQmx functions like you linked will not work in FPGA. Synchronizing a DSA and SAR module in FPGA can be tricky. See this long thread

Good luck.

mcduff