Synchronized acquisition in RT with an external clock through a PXI 6533

[Frank B.]

Hi,

Context:
I want to acquire 32 bits of data with a 6533 in RT at a frequency of 1,25 kHz or 2,5 kHz. These data and clock are generated by an external FPGA with a correct timing for the 6533.
I have configured the data acquisition in Pattern I/O with the clock entering the REQ pin of the 6533.
The problem is that the DIO Read function that I use in the Time Critical loop seems to prevent any other task (TC as well as normal priority tasks) to be done when I launch the .vi. So that I lose the PXI control and have to reboot the system.
To avoid that, I have tried to use DAQ occurrences, but the Wait On Occurrence function seems to be limited to a 1 ms period.
Are DAQ occurrences compati
ble with RT, are they a good solution to my problem, and if yes, how to configure it to get a synchronized frequency ?

Configuration:
PXI 1000B + PXI 8145RT + PXI 6533 + PXI 6052E + PXI 8420
LV 6.1 RT
NI DAQ 6.9.2

Thanks in advance for your help.

[Bob_Preis]

Does this Knowledgebase article help?

[Frank B.]

Hi,

I tried to add a DIO Wait function as mentioned in the knowledgebase article, but whatever the �check every N milliseconds� value (I tried between 100 ms and 1 ms), the DIO Wait function generates the following error without any data having been read:
�
Error -10803 occurred at Digital Buffer Read.

Possible reasons:

NI-DAQ LV: The on-going transfer has been stopped. This is to prevent regeneration for output operations, or to reallocate resources for input operations.�

I have to mention that the goal of this time-critical loop is to read 1 scan of the 32 data bits each loop.
I attach to this message the TC loop I use. It communicates with a normal priority .vi through two RT FIFOs, one to control it and the second to tr
ansfer the data to a HOST PC.
Cordially.

[Bob_Preis]

This Knowledgebase lists some tips for dealing with error -10803. Check out the attached Word doc in the KB.