Hi Peeps,
I'm trying to compile my FPGA code with the Cloud Compile Service. I have an FPGA code that compiles without any problems. When I put a DMA FIFO Node into this code, I get the following Xilinx compiler error:
ERROR:HDLCompiler:410 - "/opt/apps/NIFPGA/jobs/CSD2awO_GQdD63p/NiFpgaAG_0000050c_CaseStructureFrame_0001.vhd" Line 211: Expression has 66 elements ; expected 50
Netlist NiFpgaAG_0000050c_CaseStructureFrame_0001(vhdl_labview) remains a blackbox, due to errors in its contents
The code compiles well without the DMA Node. The DMA is a Target to Host DMA, 1023 element long (Block Memory), the type of the elements is U32.
There are other thing on the block diagram as well. When I copy this SCTL into a new VI without anything else in it, it compiles without problems, regardless if the DMA Node is there.
Please find the VI snippet and the error summary attached.
Any ideas are welcome.
Cheers,
Norbert
