Timed Loop Is Not Working

[GradStudent]

Please define what you mean as "inappropriate".  Not trying to be rude but I am not sure of the capabilities of Timed Loop.  Zentheoff said it's usually used for FPGA and microprocessors.  But I just felt like that's a highly specific function for a loop that is freely available.  Which is what led me to use it after someone suggested it to me.

When you say I need to put the acquisition in a while loop, do you mean the Write to File, DAQ Assist (when I use it), or the Simulate Signal? As of right now, the write to file are reporting more than one signal (data points). I'm not sure what the timed loop settings are from when I attached it to this question, but I'm sure that it's reporting more than 8s (or whatever I programmed) worth of data.  I should also add that when I put the Signal in its own while loop, the timed loop never triggered.

To confirm, are you saying I should just get rid of the timed loop and use a while loop?  Or put the timed loop in a while loop?  Or put the enitre stacked seqence structure in a while loop?  If I use the series of booleans to turn on/off Record ON and the file writing, will I still need any loops around that specific code?  My assumption is no, but I could be wrong.

I will try out this boolean--Record ON methond. I tried this method a few days ago with a case structure and it was just gross so, I ditched it. 

[Dennis_Knutson]

Inappropriate as in using the completely wrong function. If you wanted to do addition, would you use the timed loop to perform it? Of course not. The timed loop iterates at a specific interval. It is inappropriate to use it to stop a file write after a certain interval. What it will do in your code is perform the file write at a specific interval until you stop it. Not at all the desired behavior. The fact that your simulate signal is outside the loop means that all that you are doing is writing the exact same data over and over again. Whoever suggested it, was uniformed on what it does or perhaps you misunderstood. The timed loop could replace a while loop that contains the acquisition code. This outer loop would also contain logic to write to a file when your button is true. It would also contain the logic to stop the write after some interval. This inner logic would not include any timed loops. The inner logic could contain the elapsed time function as has already been mentioned.

Your code is actually way to complicated for something as basic as this. No need for any of that initialzation, or local variables, or sequence structure. Start with the simulate signal inside a while loop and a case statement wired to your Record ON button. Inside the true case, place the file write. This give you everything except stopping the file write automatically.

[WhrlpoolMind]

Hello,

I also have problems with the Timed Loop.

I would like to manage the resources of my computer because it has to perform heavy calculations as well as strict (ms-us resolution) timing at the same time. As 4 cores are present, 2 of them do the calculations, 1 is performing the timing. The program is running well and smoothly.

I wanted to test my program on an older computer, however, the program simply did not run. As I saw, the timed loops do not start when the software trigger is generated from inside (see 1st attachement, it is a scheme of the problem, the original source code is too large). To be accurate, the "Fire Software-Triggered Timing Source.vi" is waiting for something (2nd attachement).

The test computer has 2 Pentium 4 Xeon CPU's with Hyper-Threading. The problem is present either when HT is enabled (2 logical cores per CPU) and disabled (1 logical core per CPU). My goal would be to see how the program perrforms on such an old computer.

What could I do?

Greetings,

Daniel

[WhrlpoolMind]

Edit: The problem is present either when HT is disabled and enabled.