Timed loop bug when mode is modified with the right data node

[mdelsol]

Hi,

Timed loop goes out of control, loops as fast as possible for ever, when I change the late iteration mode after first iteration.... I was surprised because my vi worked fine in LV 7.1 but now with LV8.6 doesn’t work ...also tried with LV2009 and happens the same...

I did some investigations and found that if a timed loop is started with “Process missed periods and maintain originalphase” and you assign the same mode to the right data node the timed loop goes out of control, without no reason because in fact nothing changed !!!!

So I think that this must be a bug when you assign “Process missed periods and maintain original phase” to the right data node.

Please can some one confirm that to me?

Because I would like to stat the timed loop with “Discard missed periods, ignore original phase” and after the first iteration change it to “Process missed periods and maintain original phase”.This worked fine with LV7.1 but doesn’t with LV8.6 & LV2009.