Timing error in my fpga code

[kprabaka]

Hi dan_u and T-REX$, 

              I double checked the top level clock in the FPGA project and it is 40 MHZ. For the 80 MHZ, I have a derived clock added to the project. I am working on the xilinx log. It takes some time for my computer and give me the log. I will update this information soon. 

[kprabaka]

I have attached the timing errors and also the device utilization with this. 

[kprabaka]

This is the xilinx log.

[PiDi]

Show the configuration of DC and RMS Measurement blocks.

[T-REX$]

Hi Kumar,

Well, it looks like you're using up all of the multipliers on the device with just these 6 DC-RMS VIs. If you can deal with less numerical precision, it may help to cast your Analog Input values to a different fixed point configuration that uses less resources. A second option would be to try inserting extra registers between the IO and the "Fixed" multiplier resources. Usually this only matters within an SCTL, but with all multipliers being used, it looks like the compiler might be seeing some congestion issues. Basically, just insert a Feedforward Node (a feedback node with the direction changed) after all of the AIO, but before the DC-RMS VIs. Finally, do you still get compilation errors if you remove one (or two, or 3) of the lines your calculating? How many of these can you do before you start running into timing violations?

[kprabaka]

Hi, The following picture shows the configuration.

I am trying to measure RMS of a 60 HZ sinusoidal waveform with NI 9205 AI.

[kprabaka]

Hi T-REX$, 

         I am trying to find that number. I will update soon. 

-Kumar

[kprabaka]

Seems like I can use around 4 RMS blocks without timing error. I would really like to use six RMS blocks. Is there any way that I can use six RMS blocks without creating the timing error. 

[T-REX$ · Accepted solution]

As I mentioned before, I would try adding another register between the IO and the RMS calculation. Looks something like this:

Also, your data-type coming off of the module is FXP<+-, 26, 5>. If you can get this down to 18-bits wide instead of 26, it should save you some multipliers since the ones on your device are 18x18. I don't know what the requirements for your measurement are, but it could solve some issues if your system can tolerate some loss in precision or range (no need to go +-16V if you're only looking at a 5V signal).

[kprabaka]

Hi T-REX$, 

       Thank you for your help. Your suggestion worked. I am able to compile my code without any error. 

Regards,

Kumar