Two host VI possible in FPGA?

[Bladhart]

Hello all,

I have a project with host VI's and FPGA VI's.

1. Is it possible to be runnig two host VI's that opens (reference to) the same FPGA VI at the same time?

2. Is it possible to be runing two host VI's on two different FPGA VI that uses the same FPGA card at the same time? If possible, how should the FPGA be compiled?

Thanks.

[sankah2k]

Hi Bladhart,

Unfortunately I believe the answer to both your queries is no. You wouldn't be able to simultaneously run two host VIs that access the FPGA or have two FPGA VIs running at the same time on a single FPGA hardware.

However this is possible. During development you would be able to have a single FPGA VI and have two versions of the host referencing to it (from the FPGA Init). Each can access the FPGA VI separately during run time, but not both together. This is commonly used when the FPGA part of the code is fixed and you would like to test different implementations of the host.

Is there a chance where you could integrate both host VIs into one single VI?

You are allowed to have multiple FPGA VIs in the LabVIEW project, but only one would be deployed and run on the hardware at a single time.

Hope this helps

Sanka

[Bladhart]

Hello Sanka,

 Thanks for the reply.  This confirmed my believe of how the FPGA works (and what I was afraid was true).

[VittoHAN]

Hi,

Even though I know this thread is very old, 3 years ago...

But I still have to say something, just in order to correct sth.

Actualy, we can read two FPGA references in one vi, (for example, reading two chanels of one card/slot in the same vi).

The only thing you need to do is wire a time delay between FPGA reference opening and data read/write.