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Type not supported in current target.

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as you can see in the attached image the wires are yellow and I cannot compile because of this!

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Message 11 of 18
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Now I see the issue.  Your analogs are using fixed point.  Change your integers (specifically the two 0 constants) to match the same fixed point configuration and it will be fine.


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Message 12 of 18
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Again not working, please see the attached figure!

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Message 13 of 18
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Try to delete the wires and redraw them.

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Message 14 of 18
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I deleted but not woking!!!! still the same error

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Message 15 of 18
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Okay, I get the same problems if I try to make the same for-loop in a new vi. 

 

What you can do, and what gives me problems is the last ADD function. 

You can go into the functions property and change the output of the function. Right-click on the ADD function and select Properties. 

The select the tab Output Configuration, there you can select the FXP as output, you just have to know what Fxp settings you want.

Message 16 of 18
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The issue you are seeing is caused by the type calculations (propagation) of the fixed-point types. Fixed-point types are intended to be a loss-less type by default, which means the type grows in bits to attempt to avoid overflow or quantization of the values. 

 

2015-11-18_9-08-16.png

 

In your application, you have two code paths that have feedback from previous iterations. Since the compiler couldn't figure out a type that could hold all possible values for an unknown number of iterations, it decided to bump the fixed-point type up to a floating point type, which happens to be double-precision floating point by default. This is how LabVIEW, especially on FPGA, gives you a hint that some decisions need to be made about how the data should be handled.

 

If you right-click on the Add primitive and go to Properties >> Output Configuration where you can manually change the type to something that will work for your application. If you are just starting out and want to make sure things work, you can try using single-precision floating point which is supported on most FPGA targets.

 

Once that's working, you can analyze the range of the values on those wires, either empirically or formulaically, and set the output configuration to a fixed-point type that is suitable for your requirements. How to properly do that would require another thread : )

Message 17 of 18
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Thanks for your time, I have changed the VI as follows and now I have some results, please see the figure

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Message 18 of 18
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