10-21-2018 04:09 AM - edited 10-21-2018 04:13 AM
Hi everybody,
Strange as it sounds but suddenly I am unable to compile my FPGA VIs for myRIO
Error Message: "Application failed to start correctly". This happens at the "Generating Xilinx IP" stage and compilation stops.
I have scouted here and here but a simple uninstall-reinstall exercise wouldn't fix. I think it has something to do with the latest Win-10 update. Does anyone has any workaround?
Using:
LV14,LVFPGA14, Compilation Tools for Vivado 2013.4 (they all ship with myRIO), local compile server on a Windows10.
Solved! Go to Solution.
10-21-2018
05:19 AM
- last edited on
11-18-2024
12:10 PM
by
Content Cleaner
WIndows 10 does not support Vivado tools prior to 2018. Yours are way too old.
Follow the flowchart here for possible solutions.
(see also)