LabVIEW

cancel
Showing results for 
Search instead for 
Did you mean: 

acquiisition voltage levels in 6551

Hi All,

 

The digital input signal on my acquisition line swings 0 to 2.5V as measured using an oscilloscope.  If I set the acquisition high level to 2.25 (90% of swing) I don't observe the right data.  I need to reduce the acq high level to 2V.

 

This behavor appears to be ratiometric, in that  if the signal swng is 0 to 2V, I cannot set acquisition high at 1.8 but must reduce it by 200mV to 300mV.

 

It cannot be a voltage division effect with the source impedance since this would have been observed on the scope.

 

What could be causing this and what might the solution be?

 

Thanks.

 

Anand

0 Kudos
Message 1 of 12
(3,932 Views)

Hi All,

 

There is a mistake in the above post.  The required acquisition high level is not ratiometric, rather requires a 500mV offset.  So I'm somehow losing signal internal to the flying lead cable and HSDIO card.

 

Anand

0 Kudos
Message 2 of 12
(3,931 Views)

Hi All,

 

I think I know what the problem is.

 

I'm trying to test ViH and ViL of a DUT.  So I generate signals that swing from 0.3Vdd to 0.7Vdd for example.  The DUT responds with a signal that swings 0 to Vdd.  If my HSDIO acquisition level is set to anything GREATER than 0.7Vdd (which is the generation level) no acquisition takes place. The generation and acquisition channels are not the same.  

 

Why will the 6551 not allow me to acquire voltage levels that exceed the generation levels?

 

Thanks in anticipation.

 

Anand

0 Kudos
Message 3 of 12
(3,926 Views)

Anand,

 

The input and output levels are independent.  There's no requirement that acquisition levels must be larger than generation levels.  The only requirement is that VIH be larger than VIL.

 

I may be that you need to get your levels closer to the 50% point.  Most CMOS type receivers will have a switching threshold between 45% and 55%.  When you make your levels higher outside of this range, 10% and 90% for example, you're switching at a point in the waveform that may be non optimal due to slew rate limiting or transmission effects.  If you have a sharkfin signal, for example, if you'r switching at 90%, there's not much signal above that threshold.

0 Kudos
Message 4 of 12
(3,908 Views)

Hello Ryan,

 

For my application I must have the acquisition level to be 90% of Vdd or 0.9Vdd.  The generation level is set at 0.7Vdd. Regardless of variations in the generation level, the DUT always swings 0 to Vdd as measured.  But I can acquire at 0.9Vdd only when I set the genHighLevel (on an adjacent channel) to greater than 0.9Vdd.

 

I have tried the above test even with a DC power supply driving the acquisition channel instead of the DUT with the same observations.

 

Anand

0 Kudos
Message 5 of 12
(3,899 Views)

Anand,

 

Can you give some more details about your application.  I think that may clear up some questions.  Specifically about connectivity, data rates, clocking setup, channel mapping, are you driving and acquiring on the same channel at the same time, etc.  Any details would be helpful.

Message Edited by Ryan M on 06-26-2009 12:35 PM
0 Kudos
Message 6 of 12
(3,896 Views)

Hello Ryan,

 

I write on Channel DIO 12.  I read on Channel DIO 13.  DUT is set to Vdd = 3V.  DIO 12 output (from 6551) sends logic signals 0.3Vdd (low) to 0.7Vdd (high).  The clock rate is 40MHz, but since I create vectors, the actual signal speed is 500kHz.  

 

Now lets say I do the following

 

1.  Disconnect DUT from DIO 13 and instead apply a 3V DC signal at DIO 13. 

 

2. DIO 12 is set to generate a dummy signal that swings 0.9V to 2.1V (genLowLevel = 0.9, genHighLevel = 2.1).

 

3.  DIO 13 is setup to acquire with acqHighLevel at 2.7V (input signal is DC at 3V).

 

4.  Instead of reading all '1"s on DIO 13, I read all '0's.

 

5.  The situation is remedied by setting DIO 12 to generate (which is a dummy signal) from 0.9V (LOW) to 2.7V (HIGH).

 

Anand

0 Kudos
Message 7 of 12
(3,888 Views)

Anand,

 

If you tristate DIO12 or turn it off, what happens to your DIO13 acquisition?

 

What about a static acquisition?

 

Do you have a simple piece of code that we can try here to help you debug?

Message Edited by Ryan M on 06-26-2009 05:03 PM
0 Kudos
Message 8 of 12
(3,878 Views)

Anand,

 

sorry, two other simple things, can you try using a couple different IO 

 

can you try...

generating on 13, acquiring on 12

generating on 12, acquiring on 14

generating on 14, acquiring on 12

 

Additionally, can you force channel 13's driver off by calling the "tristate" vi on that channel.

Message Edited by Ryan M on 06-26-2009 05:16 PM
0 Kudos
Message 9 of 12
(3,874 Views)

Thanks Ryan,

 

Will do.  I'll send the code to Jordan Fink who can forward it to you.  The code is simple enough.  It generates on Channels 7, 11, 12 and acquires on 13.  

 

Sorry, company rules prevent me from posting the code as is on the discussion forum :-(.

 

Anand

0 Kudos
Message 10 of 12
(3,871 Views)