acquiring input from crio in fpga mode

[johnnewton]

Hi,

I am struggling with connecting A2 input from analogue module to open fpga reference pallette. I have my fpga compiled and configured. I created control for open reference pallette but I still can't select A2 from my cRIO.

Any ideas??

Thanks

[Davidek]

Hi John

I would recommend having a look at some of the examples in the Example Finder. In LabVIEW go to Help -> Find Examples. Then navigate to Hardware Input and Output -> CompactRIO -> Basic IO in the Folder structure. Open the Analog Input - cRIO example and have a look at the RT host and the FPGA VI.

If you continue to have problems could you post your code here so we can have a look at what you've done so far?

Best Regards

David

NISW

Message Edited by Davidek on 03-15-2010 05:36 AM

[johnnewton]

Thanks for reply David. In all examples there's a concatenate string and input control connected to open fpga reference. This is where I am having trouble, replacing the concatenate string and input control with RIO input.

I dragged the FPGA input from project explorer into block diagram, tried to connect it with resource name but its a broken arrow. Help please!

Best regards

[Davidek]

Hi

One option is to just remove the input control and the concatenate string and instead just right-click the Open FPGA Reference VI and select the "Configure Open FPGA Reference VI" option at the bottom. Assuming you are using a project and that your FPGA VI is located correctly under the FPGA in the project you can just select the VI option at the top, click the Browse Project button and select your FPGA VI in the pop-up.

This is the same as using the Input controller to set which FPGA and VI you want to open a reference to. The reason you use a control is so you can set it without having to go into the code. This has the same effect and saves you the trouble of knowing the syntax to call the FPGA VI.

Hope this helps

Best Regards

David

[johnnewton]

Hi David,

I dont think we are in the same boat. I am trying to use the example count and period lv.proj to measure frequency of input signal on my compact rio. I dont know how to specify the input of my compact rio in FPGA vi in this example.

Much obliged!

[Davidek]

Hi 

Yes, feels like we are talking about different things. Please post the code you've created so far so I can see the problem for myself.

Best Regards

David

[johnnewton]

Here's the code.

[Davidek]

Hi again

Sorry, that isn't your code, it's just your project file. The project file does not actually contain any of the VIs in the project, just links to the files. You need to post the VIs you've written too.

Best Regards

David 

[johnnewton]

Sorry David,

Please find attached the code. I was in middle of preparing the host code, so you might find it confusing as its not finished yet. But we could keep our discussion to the initial problem.

Thanks

[johnnewton]

My mistake again!!!! Please find attached code.

Ta